diff options
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt6795.dtsi | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index 7123c1bf8d9e..b6f7681cc151 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -162,18 +162,6 @@ #clock-cells = <0>; }; - rtc_clk: dummy32k { - compatible = "fixed-clock"; - clock-frequency = <32000>; - #clock-cells = <0>; - }; - - uart_clk: dummy26m { - compatible = "fixed-clock"; - clock-frequency = <26000000>; - #clock-cells = <0>; - }; - pmu { compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_LOW>, @@ -235,7 +223,7 @@ "mediatek,mt6577-uart"; reg = <0 0x11002000 0 0x400>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&clk26m>; status = "disabled"; }; @@ -244,7 +232,7 @@ "mediatek,mt6577-uart"; reg = <0 0x11003000 0 0x400>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&clk26m>; status = "disabled"; }; @@ -253,7 +241,7 @@ "mediatek,mt6577-uart"; reg = <0 0x11004000 0 0x400>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&clk26m>; status = "disabled"; }; @@ -262,7 +250,7 @@ "mediatek,mt6577-uart"; reg = <0 0x11005000 0 0x400>; interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; + clocks = <&clk26m>; status = "disabled"; }; }; |