diff options
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 |
1 files changed, 26 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 4aeca9e7e30d..09aefb4e90f8 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -40,6 +40,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/clock/sun8i-de2.h> #include <dt-bindings/clock/sun8i-h3-ccu.h> #include <dt-bindings/clock/sun8i-r-ccu.h> @@ -386,7 +387,7 @@ ccu: clock@1c20000 { /* compatible is in per SoC .dtsi file */ reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -398,7 +399,8 @@ interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -818,7 +820,7 @@ reg-io-width = <1>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, - <&ccu CLK_HDMI>, <&rtc 0>; + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; clock-names = "iahb", "isfr", "tmds", "cec"; resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; @@ -878,7 +880,7 @@ r_ccu: clock@1f01400 { compatible = "allwinner,sun8i-h3-r-ccu"; reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; @@ -913,12 +915,26 @@ #size-cells = <0>; }; + r_uart: serial@1f02800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01f02800 0x400>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&r_ccu CLK_APB0_UART>; + resets = <&r_ccu RST_APB0_UART>; + pinctrl-names = "default"; + pinctrl-0 = <&r_uart_pins>; + status = "disabled"; + }; + r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -939,6 +955,11 @@ pins = "PL10"; function = "s_pwm"; }; + + r_uart_pins: r-uart-pins { + pins = "PL2", "PL3"; + function = "s_uart"; + }; }; r_pwm: pwm@1f03800 { |