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Diffstat (limited to 'arch/arm/plat-iop/time.c')
-rw-r--r--arch/arm/plat-iop/time.c66
1 files changed, 35 insertions, 31 deletions
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index f530abdaa7a1..16300adfb4de 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -24,39 +24,45 @@
#include <asm/uaccess.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
-
-#ifdef CONFIG_ARCH_IOP32X
-#define IRQ_IOP3XX_TIMER0 IRQ_IOP32X_TIMER0
-#else
-#ifdef CONFIG_ARCH_IOP33X
-#define IRQ_IOP3XX_TIMER0 IRQ_IOP33X_TIMER0
-#endif
-#endif
+#include <asm/arch/time.h>
static unsigned long ticks_per_jiffy;
static unsigned long ticks_per_usec;
static unsigned long next_jiffy_time;
-unsigned long iop3xx_gettimeoffset(void)
+unsigned long iop_gettimeoffset(void)
{
- unsigned long offset;
+ unsigned long offset, temp1, temp2;
- offset = next_jiffy_time - *IOP3XX_TU_TCR1;
+ /* enable cp6, if necessary, to avoid taking the overhead of an
+ * undefined instruction trap
+ */
+ asm volatile (
+ "mrc p15, 0, %0, c15, c1, 0\n\t"
+ "ands %1, %0, #(1 << 6)\n\t"
+ "orreq %0, %0, #(1 << 6)\n\t"
+ "mcreq p15, 0, %0, c15, c1, 0\n\t"
+#ifdef CONFIG_XSCALE
+ "mrceq p15, 0, %0, c15, c1, 0\n\t"
+ "moveq %0, %0\n\t"
+ "subeq pc, pc, #4\n\t"
+#endif
+ : "=r"(temp1), "=r"(temp2) : : "cc");
+
+ offset = next_jiffy_time - read_tcr1();
return offset / ticks_per_usec;
}
static irqreturn_t
-iop3xx_timer_interrupt(int irq, void *dev_id)
+iop_timer_interrupt(int irq, void *dev_id)
{
write_seqlock(&xtime_lock);
- iop3xx_cp6_enable();
- asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));
- iop3xx_cp6_disable();
+ write_tisr(1);
- while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1)
- >= ticks_per_jiffy) {
+ while ((signed long)(next_jiffy_time - read_tcr1())
+ >= ticks_per_jiffy) {
timer_tick();
next_jiffy_time -= ticks_per_jiffy;
}
@@ -66,13 +72,13 @@ iop3xx_timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static struct irqaction iop3xx_timer_irq = {
- .name = "IOP3XX Timer Tick",
- .handler = iop3xx_timer_interrupt,
+static struct irqaction iop_timer_irq = {
+ .name = "IOP Timer Tick",
+ .handler = iop_timer_interrupt,
.flags = IRQF_DISABLED | IRQF_TIMER,
};
-void __init iop3xx_init_time(unsigned long tick_rate)
+void __init iop_init_time(unsigned long tick_rate)
{
u32 timer_ctl;
@@ -80,19 +86,17 @@ void __init iop3xx_init_time(unsigned long tick_rate)
ticks_per_usec = tick_rate / 1000000;
next_jiffy_time = 0xffffffff;
- timer_ctl = IOP3XX_TMR_EN | IOP3XX_TMR_PRIVILEGED |
- IOP3XX_TMR_RELOAD | IOP3XX_TMR_RATIO_1_1;
+ timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |
+ IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1;
/*
* We use timer 0 for our timer interrupt, and timer 1 as
* monotonic counter for tracking missed jiffies.
*/
- iop3xx_cp6_enable();
- asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));
- asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
- asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));
- asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));
- iop3xx_cp6_disable();
-
- setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq);
+ write_trr0(ticks_per_jiffy - 1);
+ write_tmr0(timer_ctl);
+ write_trr1(0xffffffff);
+ write_tmr1(timer_ctl);
+
+ setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
}