diff options
Diffstat (limited to 'include/dt-bindings/gpio')
| -rw-r--r-- | include/dt-bindings/gpio/gpio.h | 3 | ||||
| -rw-r--r-- | include/dt-bindings/gpio/meson-s4-gpio.h | 99 | ||||
| -rw-r--r-- | include/dt-bindings/gpio/msc313-gpio.h | 124 | ||||
| -rw-r--r-- | include/dt-bindings/gpio/tegra186-gpio.h | 4 | ||||
| -rw-r--r-- | include/dt-bindings/gpio/tegra234-gpio.h | 63 | ||||
| -rw-r--r-- | include/dt-bindings/gpio/tegra241-gpio.h | 42 |
6 files changed, 333 insertions, 2 deletions
diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h index c029467e828b..5566e58196a2 100644 --- a/include/dt-bindings/gpio/gpio.h +++ b/include/dt-bindings/gpio/gpio.h @@ -39,4 +39,7 @@ /* Bit 5 express pull down */ #define GPIO_PULL_DOWN 32 +/* Bit 6 express pull disable */ +#define GPIO_PULL_DISABLE 64 + #endif diff --git a/include/dt-bindings/gpio/meson-s4-gpio.h b/include/dt-bindings/gpio/meson-s4-gpio.h new file mode 100644 index 000000000000..35aee21b94f1 --- /dev/null +++ b/include/dt-bindings/gpio/meson-s4-gpio.h @@ -0,0 +1,99 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. + * Author: Qianggui Song <qianggui.song@amlogic.com> + */ + +#ifndef _DT_BINDINGS_MESON_S4_GPIO_H +#define _DT_BINDINGS_MESON_S4_GPIO_H + +#define GPIOB_0 0 +#define GPIOB_1 1 +#define GPIOB_2 2 +#define GPIOB_3 3 +#define GPIOB_4 4 +#define GPIOB_5 5 +#define GPIOB_6 6 +#define GPIOB_7 7 +#define GPIOB_8 8 +#define GPIOB_9 9 +#define GPIOB_10 10 +#define GPIOB_11 11 +#define GPIOB_12 12 +#define GPIOB_13 13 + +#define GPIOC_0 14 +#define GPIOC_1 15 +#define GPIOC_2 16 +#define GPIOC_3 17 +#define GPIOC_4 18 +#define GPIOC_5 19 +#define GPIOC_6 20 +#define GPIOC_7 21 + +#define GPIOE_0 22 +#define GPIOE_1 23 + +#define GPIOD_0 24 +#define GPIOD_1 25 +#define GPIOD_2 26 +#define GPIOD_3 27 +#define GPIOD_4 28 +#define GPIOD_5 29 +#define GPIOD_6 30 +#define GPIOD_7 31 +#define GPIOD_8 32 +#define GPIOD_9 33 +#define GPIOD_10 34 +#define GPIOD_11 35 + +#define GPIOH_0 36 +#define GPIOH_1 37 +#define GPIOH_2 38 +#define GPIOH_3 39 +#define GPIOH_4 40 +#define GPIOH_5 41 +#define GPIOH_6 42 +#define GPIOH_7 43 +#define GPIOH_8 44 +#define GPIOH_9 45 +#define GPIOH_10 46 +#define GPIOH_11 47 + +#define GPIOX_0 48 +#define GPIOX_1 49 +#define GPIOX_2 50 +#define GPIOX_3 51 +#define GPIOX_4 52 +#define GPIOX_5 53 +#define GPIOX_6 54 +#define GPIOX_7 55 +#define GPIOX_8 56 +#define GPIOX_9 57 +#define GPIOX_10 58 +#define GPIOX_11 59 +#define GPIOX_12 60 +#define GPIOX_13 61 +#define GPIOX_14 62 +#define GPIOX_15 63 +#define GPIOX_16 64 +#define GPIOX_17 65 +#define GPIOX_18 66 +#define GPIOX_19 67 + +#define GPIOZ_0 68 +#define GPIOZ_1 69 +#define GPIOZ_2 70 +#define GPIOZ_3 71 +#define GPIOZ_4 72 +#define GPIOZ_5 73 +#define GPIOZ_6 74 +#define GPIOZ_7 75 +#define GPIOZ_8 76 +#define GPIOZ_9 77 +#define GPIOZ_10 78 +#define GPIOZ_11 79 +#define GPIOZ_12 80 + +#define GPIO_TEST_N 81 +#endif /* _DT_BINDINGS_MESON_S4_GPIO_H */ diff --git a/include/dt-bindings/gpio/msc313-gpio.h b/include/dt-bindings/gpio/msc313-gpio.h new file mode 100644 index 000000000000..5458c6580a02 --- /dev/null +++ b/include/dt-bindings/gpio/msc313-gpio.h @@ -0,0 +1,124 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +/* + * GPIO definitions for MStar/SigmaStar MSC313 and later SoCs + * + * Copyright (C) 2020 Daniel Palmer <daniel@thingy.jp> + */ + +#ifndef _DT_BINDINGS_MSC313_GPIO_H +#define _DT_BINDINGS_MSC313_GPIO_H + +#define MSC313_GPIO_FUART 0 +#define MSC313_GPIO_FUART_RX (MSC313_GPIO_FUART + 0) +#define MSC313_GPIO_FUART_TX (MSC313_GPIO_FUART + 1) +#define MSC313_GPIO_FUART_CTS (MSC313_GPIO_FUART + 2) +#define MSC313_GPIO_FUART_RTS (MSC313_GPIO_FUART + 3) + +#define MSC313_GPIO_SR (MSC313_GPIO_FUART_RTS + 1) +#define MSC313_GPIO_SR_IO2 (MSC313_GPIO_SR + 0) +#define MSC313_GPIO_SR_IO3 (MSC313_GPIO_SR + 1) +#define MSC313_GPIO_SR_IO4 (MSC313_GPIO_SR + 2) +#define MSC313_GPIO_SR_IO5 (MSC313_GPIO_SR + 3) +#define MSC313_GPIO_SR_IO6 (MSC313_GPIO_SR + 4) +#define MSC313_GPIO_SR_IO7 (MSC313_GPIO_SR + 5) +#define MSC313_GPIO_SR_IO8 (MSC313_GPIO_SR + 6) +#define MSC313_GPIO_SR_IO9 (MSC313_GPIO_SR + 7) +#define MSC313_GPIO_SR_IO10 (MSC313_GPIO_SR + 8) +#define MSC313_GPIO_SR_IO11 (MSC313_GPIO_SR + 9) +#define MSC313_GPIO_SR_IO12 (MSC313_GPIO_SR + 10) +#define MSC313_GPIO_SR_IO13 (MSC313_GPIO_SR + 11) +#define MSC313_GPIO_SR_IO14 (MSC313_GPIO_SR + 12) +#define MSC313_GPIO_SR_IO15 (MSC313_GPIO_SR + 13) +#define MSC313_GPIO_SR_IO16 (MSC313_GPIO_SR + 14) +#define MSC313_GPIO_SR_IO17 (MSC313_GPIO_SR + 15) + +#define MSC313_GPIO_SD (MSC313_GPIO_SR_IO17 + 1) +#define MSC313_GPIO_SD_CLK (MSC313_GPIO_SD + 0) +#define MSC313_GPIO_SD_CMD (MSC313_GPIO_SD + 1) +#define MSC313_GPIO_SD_D0 (MSC313_GPIO_SD + 2) +#define MSC313_GPIO_SD_D1 (MSC313_GPIO_SD + 3) +#define MSC313_GPIO_SD_D2 (MSC313_GPIO_SD + 4) +#define MSC313_GPIO_SD_D3 (MSC313_GPIO_SD + 5) + +#define MSC313_GPIO_I2C1 (MSC313_GPIO_SD_D3 + 1) +#define MSC313_GPIO_I2C1_SCL (MSC313_GPIO_I2C1 + 0) +#define MSC313_GPIO_I2C1_SDA (MSC313_GPIO_I2C1 + 1) + +#define MSC313_GPIO_SPI0 (MSC313_GPIO_I2C1_SDA + 1) +#define MSC313_GPIO_SPI0_CZ (MSC313_GPIO_SPI0 + 0) +#define MSC313_GPIO_SPI0_CK (MSC313_GPIO_SPI0 + 1) +#define MSC313_GPIO_SPI0_DI (MSC313_GPIO_SPI0 + 2) +#define MSC313_GPIO_SPI0_DO (MSC313_GPIO_SPI0 + 3) + +/* SSD20x */ +#define SSD20XD_GPIO_FUART 0 +#define SSD20XD_GPIO_FUART_RX (SSD20XD_GPIO_FUART + 0) +#define SSD20XD_GPIO_FUART_TX (SSD20XD_GPIO_FUART + 1) +#define SSD20XD_GPIO_FUART_CTS (SSD20XD_GPIO_FUART + 2) +#define SSD20XD_GPIO_FUART_RTS (SSD20XD_GPIO_FUART + 3) + +#define SSD20XD_GPIO_SD (SSD20XD_GPIO_FUART_RTS + 1) +#define SSD20XD_GPIO_SD_CLK (SSD20XD_GPIO_SD + 0) +#define SSD20XD_GPIO_SD_CMD (SSD20XD_GPIO_SD + 1) +#define SSD20XD_GPIO_SD_D0 (SSD20XD_GPIO_SD + 2) +#define SSD20XD_GPIO_SD_D1 (SSD20XD_GPIO_SD + 3) +#define SSD20XD_GPIO_SD_D2 (SSD20XD_GPIO_SD + 4) +#define SSD20XD_GPIO_SD_D3 (SSD20XD_GPIO_SD + 5) + +#define SSD20XD_GPIO_UART0 (SSD20XD_GPIO_SD_D3 + 1) +#define SSD20XD_GPIO_UART0_RX (SSD20XD_GPIO_UART0 + 0) +#define SSD20XD_GPIO_UART0_TX (SSD20XD_GPIO_UART0 + 1) + +#define SSD20XD_GPIO_UART1 (SSD20XD_GPIO_UART0_TX + 1) +#define SSD20XD_GPIO_UART1_RX (SSD20XD_GPIO_UART1 + 0) +#define SSD20XD_GPIO_UART1_TX (SSD20XD_GPIO_UART1 + 1) + +#define SSD20XD_GPIO_TTL (SSD20XD_GPIO_UART1_TX + 1) +#define SSD20XD_GPIO_TTL0 (SSD20XD_GPIO_TTL + 0) +#define SSD20XD_GPIO_TTL1 (SSD20XD_GPIO_TTL + 1) +#define SSD20XD_GPIO_TTL2 (SSD20XD_GPIO_TTL + 2) +#define SSD20XD_GPIO_TTL3 (SSD20XD_GPIO_TTL + 3) +#define SSD20XD_GPIO_TTL4 (SSD20XD_GPIO_TTL + 4) +#define SSD20XD_GPIO_TTL5 (SSD20XD_GPIO_TTL + 5) +#define SSD20XD_GPIO_TTL6 (SSD20XD_GPIO_TTL + 6) +#define SSD20XD_GPIO_TTL7 (SSD20XD_GPIO_TTL + 7) +#define SSD20XD_GPIO_TTL8 (SSD20XD_GPIO_TTL + 8) +#define SSD20XD_GPIO_TTL9 (SSD20XD_GPIO_TTL + 9) +#define SSD20XD_GPIO_TTL10 (SSD20XD_GPIO_TTL + 10) +#define SSD20XD_GPIO_TTL11 (SSD20XD_GPIO_TTL + 11) +#define SSD20XD_GPIO_TTL12 (SSD20XD_GPIO_TTL + 12) +#define SSD20XD_GPIO_TTL13 (SSD20XD_GPIO_TTL + 13) +#define SSD20XD_GPIO_TTL14 (SSD20XD_GPIO_TTL + 14) +#define SSD20XD_GPIO_TTL15 (SSD20XD_GPIO_TTL + 15) +#define SSD20XD_GPIO_TTL16 (SSD20XD_GPIO_TTL + 16) +#define SSD20XD_GPIO_TTL17 (SSD20XD_GPIO_TTL + 17) +#define SSD20XD_GPIO_TTL18 (SSD20XD_GPIO_TTL + 18) +#define SSD20XD_GPIO_TTL19 (SSD20XD_GPIO_TTL + 19) +#define SSD20XD_GPIO_TTL20 (SSD20XD_GPIO_TTL + 20) +#define SSD20XD_GPIO_TTL21 (SSD20XD_GPIO_TTL + 21) +#define SSD20XD_GPIO_TTL22 (SSD20XD_GPIO_TTL + 22) +#define SSD20XD_GPIO_TTL23 (SSD20XD_GPIO_TTL + 23) +#define SSD20XD_GPIO_TTL24 (SSD20XD_GPIO_TTL + 24) +#define SSD20XD_GPIO_TTL25 (SSD20XD_GPIO_TTL + 25) +#define SSD20XD_GPIO_TTL26 (SSD20XD_GPIO_TTL + 26) +#define SSD20XD_GPIO_TTL27 (SSD20XD_GPIO_TTL + 27) + +#define SSD20XD_GPIO_GPIO (SSD20XD_GPIO_TTL27 + 1) +#define SSD20XD_GPIO_GPIO0 (SSD20XD_GPIO_GPIO + 0) +#define SSD20XD_GPIO_GPIO1 (SSD20XD_GPIO_GPIO + 1) +#define SSD20XD_GPIO_GPIO2 (SSD20XD_GPIO_GPIO + 2) +#define SSD20XD_GPIO_GPIO3 (SSD20XD_GPIO_GPIO + 3) +#define SSD20XD_GPIO_GPIO4 (SSD20XD_GPIO_GPIO + 4) +#define SSD20XD_GPIO_GPIO5 (SSD20XD_GPIO_GPIO + 5) +#define SSD20XD_GPIO_GPIO6 (SSD20XD_GPIO_GPIO + 6) +#define SSD20XD_GPIO_GPIO7 (SSD20XD_GPIO_GPIO + 7) +#define SSD20XD_GPIO_GPIO10 (SSD20XD_GPIO_GPIO + 8) +#define SSD20XD_GPIO_GPIO11 (SSD20XD_GPIO_GPIO + 9) +#define SSD20XD_GPIO_GPIO12 (SSD20XD_GPIO_GPIO + 10) +#define SSD20XD_GPIO_GPIO13 (SSD20XD_GPIO_GPIO + 11) +#define SSD20XD_GPIO_GPIO14 (SSD20XD_GPIO_GPIO + 12) +#define SSD20XD_GPIO_GPIO85 (SSD20XD_GPIO_GPIO + 13) +#define SSD20XD_GPIO_GPIO86 (SSD20XD_GPIO_GPIO + 14) +#define SSD20XD_GPIO_GPIO90 (SSD20XD_GPIO_GPIO + 15) + +#endif /* _DT_BINDINGS_MSC313_GPIO_H */ diff --git a/include/dt-bindings/gpio/tegra186-gpio.h b/include/dt-bindings/gpio/tegra186-gpio.h index 0782b05e2775..af0d9583be70 100644 --- a/include/dt-bindings/gpio/tegra186-gpio.h +++ b/include/dt-bindings/gpio/tegra186-gpio.h @@ -8,8 +8,8 @@ * The second cell contains standard flag values specified in gpio.h. */ -#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H -#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H +#ifndef _DT_BINDINGS_GPIO_TEGRA186_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA186_GPIO_H #include <dt-bindings/gpio/gpio.h> diff --git a/include/dt-bindings/gpio/tegra234-gpio.h b/include/dt-bindings/gpio/tegra234-gpio.h new file mode 100644 index 000000000000..d7a1f2e298e8 --- /dev/null +++ b/include/dt-bindings/gpio/tegra234-gpio.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. */ + +/* + * This header provides constants for binding nvidia,tegra234-gpio*. + * + * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_TEGRA234_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA234_GPIO_H + +#include <dt-bindings/gpio/gpio.h> + +/* GPIOs implemented by main GPIO controller */ +#define TEGRA234_MAIN_GPIO_PORT_A 0 +#define TEGRA234_MAIN_GPIO_PORT_B 1 +#define TEGRA234_MAIN_GPIO_PORT_C 2 +#define TEGRA234_MAIN_GPIO_PORT_D 3 +#define TEGRA234_MAIN_GPIO_PORT_E 4 +#define TEGRA234_MAIN_GPIO_PORT_F 5 +#define TEGRA234_MAIN_GPIO_PORT_G 6 +#define TEGRA234_MAIN_GPIO_PORT_H 7 +#define TEGRA234_MAIN_GPIO_PORT_I 8 +#define TEGRA234_MAIN_GPIO_PORT_J 9 +#define TEGRA234_MAIN_GPIO_PORT_K 10 +#define TEGRA234_MAIN_GPIO_PORT_L 11 +#define TEGRA234_MAIN_GPIO_PORT_M 12 +#define TEGRA234_MAIN_GPIO_PORT_N 13 +#define TEGRA234_MAIN_GPIO_PORT_P 14 +#define TEGRA234_MAIN_GPIO_PORT_Q 15 +#define TEGRA234_MAIN_GPIO_PORT_R 16 +#define TEGRA234_MAIN_GPIO_PORT_S 17 +#define TEGRA234_MAIN_GPIO_PORT_T 18 +#define TEGRA234_MAIN_GPIO_PORT_U 19 +#define TEGRA234_MAIN_GPIO_PORT_V 20 +#define TEGRA234_MAIN_GPIO_PORT_X 21 +#define TEGRA234_MAIN_GPIO_PORT_Y 22 +#define TEGRA234_MAIN_GPIO_PORT_Z 23 +#define TEGRA234_MAIN_GPIO_PORT_AC 24 +#define TEGRA234_MAIN_GPIO_PORT_AD 25 +#define TEGRA234_MAIN_GPIO_PORT_AE 26 +#define TEGRA234_MAIN_GPIO_PORT_AF 27 +#define TEGRA234_MAIN_GPIO_PORT_AG 28 + +#define TEGRA234_MAIN_GPIO(port, offset) \ + ((TEGRA234_MAIN_GPIO_PORT_##port * 8) + offset) + +/* GPIOs implemented by AON GPIO controller */ +#define TEGRA234_AON_GPIO_PORT_AA 0 +#define TEGRA234_AON_GPIO_PORT_BB 1 +#define TEGRA234_AON_GPIO_PORT_CC 2 +#define TEGRA234_AON_GPIO_PORT_DD 3 +#define TEGRA234_AON_GPIO_PORT_EE 4 +#define TEGRA234_AON_GPIO_PORT_GG 5 + +#define TEGRA234_AON_GPIO(port, offset) \ + ((TEGRA234_AON_GPIO_PORT_##port * 8) + offset) + +#endif diff --git a/include/dt-bindings/gpio/tegra241-gpio.h b/include/dt-bindings/gpio/tegra241-gpio.h new file mode 100644 index 000000000000..80cee3016be6 --- /dev/null +++ b/include/dt-bindings/gpio/tegra241-gpio.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. */ + +/* + * This header provides constants for the nvidia,tegra241-gpio DT binding. + * + * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_TEGRA241_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA241_GPIO_H + +#include <dt-bindings/gpio/gpio.h> + +/* GPIOs implemented by main GPIO controller */ +#define TEGRA241_MAIN_GPIO_PORT_A 0 +#define TEGRA241_MAIN_GPIO_PORT_B 1 +#define TEGRA241_MAIN_GPIO_PORT_C 2 +#define TEGRA241_MAIN_GPIO_PORT_D 3 +#define TEGRA241_MAIN_GPIO_PORT_E 4 +#define TEGRA241_MAIN_GPIO_PORT_F 5 +#define TEGRA241_MAIN_GPIO_PORT_G 6 +#define TEGRA241_MAIN_GPIO_PORT_H 7 +#define TEGRA241_MAIN_GPIO_PORT_I 8 +#define TEGRA241_MAIN_GPIO_PORT_J 9 +#define TEGRA241_MAIN_GPIO_PORT_K 10 +#define TEGRA241_MAIN_GPIO_PORT_L 11 + +#define TEGRA241_MAIN_GPIO(port, offset) \ + ((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset)) + +/* GPIOs implemented by AON GPIO controller */ +#define TEGRA241_AON_GPIO_PORT_AA 0 +#define TEGRA241_AON_GPIO_PORT_BB 1 + +#define TEGRA241_AON_GPIO(port, offset) \ + ((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset)) + +#endif |