aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm64/include/asm/insn.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2022-07-11arm64: Add LDR (literal) instructionXu Kuohai1-0/+3
2022-04-01arm64, insn: Add ldr/str with immediate offsetXu Kuohai1-0/+9
2022-03-14Merge branch 'for-next/spectre-bhb' into for-next/coreWill Deacon1-0/+1
2022-02-24arm64: Use the clearbhb instruction in mitigationsJames Morse1-0/+1
2022-02-22arm64: insn: add encoders for atomic operationsHou Tao1-7/+73
2021-06-21arm64: insn: avoid circular include dependencyMark Rutland1-4/+1
2021-06-11arm64: insn: move AARCH64_INSN_SIZE into <asm/insn.h>Mark Rutland1-0/+3
2021-06-11arm64: insn: decouple patching from insn codeMark Rutland1-1/+0
2021-05-27arm64: insn: Add load/store decoding helpersJulien Thierry1-0/+28
2021-05-27arm64: insn: Add some opcodes to instruction decoderJulien Thierry1-0/+9
2021-05-27arm64: insn: Add barrier encodingsJulien Thierry1-0/+21
2021-05-27arm64: insn: Add SVE instruction classJulien Thierry1-0/+1
2021-05-27arm64: Move aarch32 condition check functionsJulien Thierry1-0/+1
2021-05-27arm64: Move patching utilities out of instruction encoding/decodingJulien Thierry1-5/+1
2020-11-09arm64: alternatives: Split up alternative.hWill Deacon1-2/+1
2020-09-14arm64: kprobe: add checks for ARMv8.3-PAuth combined instructionsAmit Daniel Kachhap1-0/+4
2020-05-04arm64: insn: Provide a better name for aarch64_insn_is_nop()Mark Brown1-1/+1
2020-05-04arm64: insn: Add constants for new HINT instruction decodeMark Brown1-2/+26
2019-11-06arm64: insn: add encoder for MOV (register)Mark Rutland1-0/+3
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner1-12/+1
2019-05-24arm64: insn: Add BUILD_BUG_ON() for invalid masksJean-Philippe Brucker1-5/+11
2019-05-24arm64: insn: Fix ldadd instruction encodingJean-Philippe Brucker1-1/+1
2019-04-26bpf, arm64: use more scalable stadd over ldxr / stxr loop in xaddDaniel Borkmann1-0/+8
2018-11-27arm64/insn: add support for emitting ADR/ADRP instructionsArd Biesheuvel1-0/+8
2018-07-05arm64: insn: Don't fallback on nosync path for general insn patchingWill Deacon1-2/+0
2018-03-19arm64; insn: Add encoder for the EXTR instructionMarc Zyngier1-0/+6
2018-03-19arm64: insn: Add encoder for bitwise operations using literalsMarc Zyngier1-0/+9
2018-03-19arm64: insn: Add N immediate encodingMarc Zyngier1-0/+1
2017-05-26arm64: Prevent cpu hotplug rwsem recursionThomas Gleixner1-1/+0
2017-05-02bpf, arm64: implement jiting of BPF_XADDDaniel Borkmann1-0/+30
2017-01-10arm64: Add helper to decode register from instructionSuzuki K Poulose1-0/+2
2016-09-09arm64: insn: Add helpers for adrp offsetsSuzuki K Poulose1-1/+10
2016-07-19arm64: Kprobes with single stepping supportSandeepa Prabhu1-0/+2
2016-07-19arm64: add conditional instruction simulation supportDavid A. Long1-0/+3
2016-07-19arm64: Add more test functions to insn.cDavid A. Long1-0/+36
2015-06-03arm64: insn: Add aarch64_{get,set}_branch_offsetMarc Zyngier1-0/+3
2015-03-30arm64: insn: Add aarch64_insn_decode_immediateMarc Zyngier1-0/+1
2015-02-23arm64: insn: fix compare-and-branch encodingsRobin Murphy1-2/+4
2014-11-20arm64: Emulate CP15 Barrier instructionsPunit Agrawal1-0/+2
2014-11-20arm64: Port SWP/SWPB emulation support from armPunit Agrawal1-0/+6
2014-11-20arm64: Add support for hooks to handle undefined instructionsPunit Agrawal1-0/+2
2014-09-08arm64: introduce aarch64_insn_gen_logical_shifted_reg()Zi Shen Lim1-0/+25
2014-09-08arm64: introduce aarch64_insn_gen_data3()Zi Shen Lim1-0/+14
2014-09-08arm64: introduce aarch64_insn_gen_data2()Zi Shen Lim1-0/+20
2014-09-08arm64: introduce aarch64_insn_gen_data1()Zi Shen Lim1-0/+13
2014-09-08arm64: introduce aarch64_insn_gen_add_sub_shifted_reg()Zi Shen Lim1-0/+11
2014-09-08arm64: introduce aarch64_insn_gen_movewide()Zi Shen Lim1-0/+13
2014-09-08arm64: introduce aarch64_insn_gen_bitfield()Zi Shen Lim1-0/+16
2014-09-08arm64: introduce aarch64_insn_gen_add_sub_imm()Zi Shen Lim1-0/+16
2014-09-08arm64: introduce aarch64_insn_gen_load_store_pair()Zi Shen Lim1-0/+16
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.