aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/cpu-probe.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2016-05-13MIPS: Add probing & defs for VZ & guest featuresJames Hogan1-0/+232
2016-05-13MIPS: Avoid magic numbers probing kscratch_maskJames Hogan1-1/+2
2016-05-13MIPS: Add perf counter featureJames Hogan1-0/+2
2016-05-13MIPS: Add defs & probing of [X]ContextConfigJames Hogan1-1/+3
2016-05-13MIPS: Add defs & probing of BadInstr[P] registersJames Hogan1-0/+4
2016-05-13MIPS: Add defs & probing of extended CP0_EBaseJames Hogan1-0/+35
2016-05-13MIPS: BMIPS: BMIPS4380 and BMIPS5000 support RIXIFlorian Fainelli1-1/+2
2016-05-13MIPS: Move RIXI exception enabling after vendor-specific cpu_probeFlorian Fainelli1-9/+9
2016-05-13MIPS: Separate XPA CPU feature into LPA and MVHJames Hogan1-0/+2
2016-05-13MIPS: Support extended ASIDsPaul Burton1-0/+13
2016-05-13MIPS: Loongson-3: Fast TLB refill handlerHuacai Chen1-1/+1
2016-05-13MIPS: Loongson: Invalidate special TLBs when neededHuacai Chen1-0/+3
2016-05-13MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen1-1/+37
2016-05-13MIPS: BMIPS: Pretty print BMIPS5200 processor nameFlorian Fainelli1-1/+4
2016-05-13MIPS: Detect DSP v3 supportZubair Lutfullah Kakakhel1-1/+4
2016-05-13MIPS: Probe the M6250 CPUPaul Burton1-0/+4
2016-05-13MIPS: Probe the P6600 corePaul Burton1-0/+4
2016-05-13MIPS: Add P6600 cases to CPU switch statementsPaul Burton1-0/+1
2016-05-13MIPS: Detect MIPSr6 Virtual Processor supportPaul Burton1-0/+2
2016-05-13MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors.David Daney1-0/+2
2016-01-20MIPS: Add IEEE Std 754 conformance mode selectionMaciej W. Rozycki1-10/+95
2016-01-20MIPS: Determine the presence of IEEE Std 754-2008 featuresMaciej W. Rozycki1-2/+74
2016-01-20MIPS: math-emu: Add IEEE Std 754-2008 NaN encoding emulationMaciej W. Rozycki1-0/+2
2016-01-20MIPS: Define the legacy-NaN and 2008-NaN featuresMaciej W. Rozycki1-0/+2
2015-11-11MIPS: Extend hardware table walking support to MIPS64Paul Burton1-2/+1
2015-09-22MIPS: Fix FTLB detection for R6James Hogan1-5/+8
2015-09-22MIPS: cpu-features: Add cpu_has_ftlbJames Hogan1-3/+5
2015-09-03MIPS: Advertise MSA support via HWCAP when presentPaul Burton1-0/+1
2015-09-03MIPS: Advertise MIPSr6 via HWCAP when appropriatePaul Burton1-0/+3
2015-09-03MIPS: AT_HWCAP aux vector infrastructurePaul Burton1-0/+3
2015-09-03MIPS: Probe for small (1KiB) page supportJames Hogan1-0/+2
2015-08-26MIPS: Set up FTLB probability for I6400Markos Chandras1-5/+13
2015-08-26MIPS: cpu-probe: Fix VTLB/FTLB configuration for R6Markos Chandras1-1/+10
2015-08-26MIPS: Add default case for the FTLB enable/disable codeMarkos Chandras1-3/+10
2015-08-26MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLBMarkos Chandras1-1/+0
2015-08-26MIPS: Add MIPS I6400 probe supportMarkos Chandras1-0/+4
2015-06-21MIPS: R12000: Enable branch prediction global historyJoshua Kinard1-2/+6
2015-06-21MIPS: ingenic: Add newer vendor IDsPaul Burton1-1/+3
2015-06-03MIPS: Avoid an FPE exception in FCSR mask probingMaciej W. Rozycki1-2/+1
2015-04-13Merge branch '4.0-fixes' into mips-for-linux-nextRalf Baechle1-0/+4
2015-04-08MIPS: Factor out FPU feature probingMaciej W. Rozycki1-54/+71
2015-04-08MIPS: Respect the ISA level in FCSR handlingMaciej W. Rozycki1-0/+53
2015-04-08MIPS: math-emu: Set FIR feature flags for full emulationMaciej W. Rozycki1-2/+23
2015-04-08MIPS: Correct ISA masking in FPU feature determinationMaciej W. Rozycki1-1/+3
2015-04-08MIPS: Clarify the comment for `__cpu_has_fpu'Maciej W. Rozycki1-1/+1
2015-04-01MIPS: Add R16000 detectionJoshua Kinard1-2/+7
2015-03-31MIPS: Add arch CDMM definitions and probingJames Hogan1-0/+2
2015-03-19MIPS: Add support for XPA.Steven J. Hill1-0/+4
2015-02-20MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill1-1/+1
2015-02-17MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras1-0/+2
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.