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2018-10-31Merge tag 'riscv-for-linus-4.20-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linuxLinus Torvalds1-3/+0
2018-10-31Move EM_RISCV into elf-em.hPalmer Dabbelt1-3/+0
2018-10-31treewide: remove current_text_addrNick Desaulniers1-6/+0
2018-10-25Merge tag 'riscv-for-linus-4.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linuxLinus Torvalds7-17/+192
2018-10-25Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds1-0/+1
2018-10-24Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespaceLinus Torvalds2-24/+1
2018-10-22RISC-V: SMP cleanup and new featuresPalmer Dabbelt3-15/+50
2018-10-22riscv: Add support to no-FPU systemsPalmer Dabbelt1-1/+11
2018-10-22RISC-V: Add futex support.Jim Wilson2-1/+128
2018-10-22RISC-V: Add FP register ptrace support for gdb.Jim Wilson1-0/+3
2018-10-22RISC-V: Show IPI statsAnup Patel1-0/+9
2018-10-22RISC-V: Use Linux logical CPU number instead of hartidAtish Patra1-3/+13
2018-10-22RISC-V: Add logical CPU indexing for RISC-VAtish Patra1-1/+23
2018-10-22RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartidPalmer Dabbelt1-1/+1
2018-10-22RISC-V: Provide a cleaner raw_smp_processor_id()Palmer Dabbelt1-10/+4
2018-10-22Auto-detect whether a FPU existsAlan Kao1-4/+4
2018-10-22Allow to disable FPU supportAlan Kao1-0/+10
2018-10-03signal: Remove the need for __ARCH_SI_PREABLE_SIZE and SI_PAD_SIZEEric W. Biederman2-24/+1
2018-09-24RISC-V: include linux/ftrace.h in asm-prototypes.hJames Cowgill1-0/+7
2018-09-05RISC-V: Request newstat syscallsGuenter Roeck1-0/+1
2018-08-28riscv: tlb: Provide definition of tlb_flush() before including tlb.hWill Deacon1-0/+4
2018-08-20RISC-V: Fix sys_riscv_flush_icachePalmer Dabbelt3-7/+13
2018-08-20riscv: Delete asm/compat.hDeepa Dinamani2-29/+1
2018-08-20RISC-V: Don't use a global include guard for uapi/asm/syscalls.hPalmer Dabbelt2-5/+13
2018-08-20RISC-V: Define sys_riscv_flush_icache when SMP=nPalmer Dabbelt1-2/+0
2018-08-19Merge tag 'riscv-for-linus-4.19-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linuxLinus Torvalds4-10/+3
2018-08-13RISC-V: Fix !CONFIG_SMP compilation errorAtish Patra1-0/+1
2018-08-13clocksource: new RISC-V SBI timer driverPalmer Dabbelt1-3/+0
2018-08-13RISC-V: add a definition for the SIE SEIE bitChristoph Hellwig1-0/+1
2018-08-13RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.hChristoph Hellwig1-4/+0
2018-08-13RISC-V: simplify software interrupt / IPI codeChristoph Hellwig2-3/+1
2018-07-25locking/atomics: Rework ordering barriersMark Rutland1-12/+5
2018-07-17Merge tag 'v4.18-rc5' into locking/core, to pick up fixesIngo Molnar1-2/+7
2018-07-04RISC-V: Add definiion of extract symbol's index and type for 32-bitZong Li1-2/+7
2018-06-21atomics/treewide: Make unconditional inc/dec ops optionalMark Rutland1-76/+0
2018-06-21atomics/treewide: Make test ops optionalMark Rutland1-46/+0
2018-06-21atomics/riscv: Define atomic64_fetch_add_unless()Mark Rutland1-6/+2
2018-06-21atomics/treewide: Make atomic_fetch_add_unless() optionalMark Rutland1-0/+1
2018-06-21atomics/treewide: Make atomic64_inc_not_zero() optionalMark Rutland1-7/+0
2018-06-21atomics/treewide: Remove redundant atomic_inc_not_zero() definitionsMark Rutland1-9/+0
2018-06-21atomics/treewide: Rename __atomic_add_unless() => atomic_fetch_add_unless()Mark Rutland1-2/+2
2018-06-16Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linuxLinus Torvalds5-5/+92
2018-06-11RISC-V: Make our port sparse-cleanPalmer Dabbelt3-5/+7
2018-06-09riscv: split the declaration of __copy_userLuc Van Oostenryck1-3/+5
2018-06-07mm: introduce ARCH_HAS_PTE_SPECIALLaurent Dufour1-3/+0
2018-06-07riscv: use NULL instead of a plain 0Luc Van Oostenryck2-2/+2
2018-06-04perf: riscv: preliminary RISC-V supportAlan Kao2-0/+85
2018-05-19riscv: add swiotlb supportChristoph Hellwig1-0/+15
2018-05-07PCI: remove PCI_DMA_BUS_IS_PHYSChristoph Hellwig1-3/+0
2018-04-24riscv: there is no <asm/handle_irq.h>Christoph Hellwig1-1/+0
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