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2008-01-28sh: Fix up 64kB page size selection on SH-5.Paul Mundt1-2/+2
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Split out extable.c _32 and _64 variants.Paul Mundt5-36/+52
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Add SH-5 support to the consistent DMA impl.Paul Mundt1-18/+28
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: flush_cache_sigtramp() takes 1 arg only.Paul Mundt1-1/+1
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move over the SH-5 head.S and tlb.h.Paul Mundt4-9/+4
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Have SH-5 provide an {en,dis}able_fpu() impl.Paul Mundt2-8/+8
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Disable initial cache flush on SH-5.Paul Mundt1-14/+18
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Don't reference UBC code in CPU init on sh64.Paul Mundt1-1/+6
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: imask IRQ depends on sh32.Paul Mundt1-1/+2
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move in the SH-5 traps.c impl.Paul Mundt4-3/+2
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move arch/sh64/kernel/sys_sh64.c to arch/sh/kernel/Paul Mundt2-1/+1
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move in the SH-5 signal trampoline impl.Paul Mundt4-5/+9
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move in the SH-5 ptrace impl.Paul Mundt4-2/+2
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Split out 29-bit and 32-bit physical mode definitions.Paul Mundt2-1/+12
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Split out processor.h in to _32 and _64 variants.Paul Mundt1-0/+21
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Split out arch/sh/kernel/process.c for _32 and _64 variants.Paul Mundt3-2/+2
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Have 32-bit use arch/sh/kernel/Makefile_32.Paul Mundt2-25/+30
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Kill off lib64 version of io.c.Paul Mundt2-138/+6
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move sh32 optimized I/O routines to arch/sh/lib/Paul Mundt3-68/+83
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Consolidate CPU features in Kconfig.cpu.Paul Mundt3-118/+104
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh64: Kill off arch/sh64/oprofile.Paul Mundt2-35/+0
The same implementation exists in arch/sh/oprofile, so get rid of this version. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move sh64 board defconfigs to arch/sh/configs.Paul Mundt3-0/+0
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move sh64 boards to arch/sh/.Paul Mundt9-0/+0
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Switch Kconfig.sh64 to use arch/sh/mm/Kconfig.Paul Mundt2-21/+14
Consolidates the HUGETLB definitions and others. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Plug SH-5 in to arch/sh/Makefile.Paul Mundt1-2/+6
Adds the ISA tuning and a lib64 rule. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move arch/sh64/lib to arch/sh/lib64.Paul Mundt12-0/+0
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move the sh64 Kconfig to arch/sh/Kconfig.sh64.Paul Mundt1-0/+0
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Add a SUPERH32 config symbol.Paul Mundt1-0/+3
We need to differentiate from SUPERH64, so add a SUPERH32 for regular sh. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Move CPU subtypes to Kconfig.sh.Paul Mundt2-190/+190
We intend to share the mm options, so move the SH-only subtypes up a level. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Rename Kconfig to Kconfig.sh.Paul Mundt1-0/+0
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh64: Use the generic rtc-sh driver.Paul Mundt1-129/+67
Rip out the sh64-specific RTC bits, use rtc-sh instead. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6Linus Torvalds57-621/+2388
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (54 commits) MAINTIANERS: just use Mike gmail e-mail for contact and pawn the serial driver off onto Sonic [Blackfin] arch: remove old I2C BF54x porting. [Blackfin] arch: Add the semtimedop syscall. Upstream uClibc doesn't compile without it. [Blackfin] arch: fix bug kernel boot message: memory information is not reasonable [Blackfin] arch: use common flash driver to setup partitions rather than the bf5xx-flash driver [Blackfin] arch: Fix bug - kernel build with Debug option enabled fails to boot up [Blackfin] arch: Fix bug Only RTC interrupt can wake up deeper sleep core. [Blackfin] arch: Add proper SW System Reset delay sequence [Blackfin] arch: Update copyright date [Blackfin] arch: GPIO API cleanup and anomaly update [Blackfin] arch: Fix BUG gpio_direction_output API is not compatitable with GENERIC_GPIO API interface [Blackfin] arch: Initial checkin of the memory protection support. [Blackfin] arch: set_bfin_dma_config shouldnt set SYNC or RESTART by default - add argument or option [Blackfin] arch: Add some comments - fix semicolons [Blackfin] arch: move all code related to CPLB handling into a new subdirectory under kernel/ [Blackfin] arch: print out list of modules if kernel is crashing and tell people if the kernel is tainted [Blackfin] arch: enable generic GPIO based I2C driver in STAMP-BF533, EZKIT-BF533 and EZKIT-BF561 boards [Blackfin] arch: Don't oops_in_progress if single step is comming from the kernel [Blackfin] arch: Fix BUG - kernel sometimes would stuck with KEYBOARD_GPIO on [Blackfin] arch: update to latest anomaly sheets ...
2008-01-27[ARM] 4615/4: sam926[13]ek buttons updatedDavid Brownell2-4/+57
From: Nicolas Ferre <nicolas.ferre@rfo.atmel.com> On the at92sam9263ek board, tell the input subsystem about the buttons. This patch is taken from Andrew Victor's at91 patchset, then updated to match the latest kernel code and to use labels printed on the board. Also update the at91sam9261ek buttons to cope with input changes. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-27i2c-au1550: Convert to platform driverManuel Lauss1-0/+21
Convert the i2c-au1550 bus driver to platform driver, and register a platform device for the Alchemy Db/Pb series of boards. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27i2c-pxa: Add polling transferMike Rapoport1-0/+6
Add polling I2C transfer implementation for PXA I2C. This is needed for cases where I2C transactions have to occur at times interrups are disabled. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: eric miao <eric.miao@marvell.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27i2c/tps65010: move header to <linux/i2c/...>David Brownell4-4/+5
Move the tps65010 header file from the OMAP arch directory to the more generic <linux/i2c/...> directory, and remove the spurious dependency of this driver on OMAP. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27i2c: normal_i2c can be made const (remaining drivers)Jean Delvare1-1/+1
Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27ixp4xx-i2c-gpioMichael-Luke Jones5-31/+38
Migrate all ixp4xx devices to the bitbanging I2C bus driver utilizing the arch-neutral GPIO API (linux/i2c-gpio.h). Tested by the nslu2-linux and openwrt projects in public firmware releases. Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk> Acked-by: Rod Whitby <rod@whitby.id.au> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-27i2c: the scheduled I2C RTC driver removalAdrian Bunk3-62/+0
This patch contains the scheduled removal of legacy I2C RTC drivers with replacement drivers. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2008-01-26ARM kprobes: let's enable itNicolas Pitre1-0/+10
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26ARM kprobes: special hook for the kprobes breakpoint handlerNicolas Pitre2-7/+13
The kprobes code is already able to cope with reentrant probes, so its handler must be called outside of the region protected by undef_lock. If ever this lock is released when handlers are called then this commit could be reverted. Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26ARM kprobes: prevent some functions involved with kprobes from being probedNicolas Pitre5-13/+11
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26ARM kprobes: don't let a single-stepped stmdb corrupt the exception stackNicolas Pitre1-3/+10
If kprobes installs a breakpoint on a "stmdb sp!, {...}" instruction, and then single-step it by simulation from the exception context, it will corrupt the saved regs on the stack from the previous context. To avoid this, let's add an optional parameter to the svc_entry macro allowing for a hole to be created on the stack before saving the interrupted context, and use it in the undef_svc handler when kprobes is enabled. Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26ARM kprobes: add the kprobes hook to the page fault handlerNicolas Pitre1-0/+27
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26ARM kprobes: core codeAbhishek Sagar2-1/+454
This is a full implementation of Kprobes including Jprobes and Kretprobes support. This ARM implementation does not follow the usual kprobes double- exception model. The traditional model is where the initial kprobes breakpoint calls kprobe_handler(), which returns from exception to execute the instruction in its original context, then immediately re-enters after a second breakpoint (or single-stepping exception) into post_kprobe_handler(), each time the probe is hit.. The ARM implementation only executes one kprobes exception per hit, so no post_kprobe_handler() phase. All side-effects from the kprobe'd instruction are resolved before returning from the initial exception. As a result, all instructions are _always_ effectively boosted regardless of the type of instruction, and even regardless of whether or not there is a post-handler for the probe. Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com> Signed-off-by: Quentin Barnes <qbarnes@gmail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26ARM kprobes: instruction single-stepping supportQuentin Barnes2-0/+1530
This is the code implementing instruction single-stepping for kprobes on ARM. To get around the limitation of no Next-PC and no hardware single- stepping, all kprobe'd instructions are split into three camps: simulation, emulation, and rejected. "Simulated" instructions are those instructions which behavior is reproduced by straight C code. "Emulated" instructions are ones that are copied, slightly altered and executed directly in the instruction slot to reproduce their behavior. "Rejected" instructions are ones that could be simulated, but work hasn't been put into simulating them. These instructions should be very rare, if not unencountered, in the kernel. If ever needed, code could be added to simulate them. One might wonder why this and the ptrace singlestep facility are not sharing some code. Both approaches are fundamentally different because the ptrace code regains control after the stepped instruction by installing a breakpoint after the instruction itself, and possibly at the location where the instruction might be branching to, instead of simulating or emulating the target instruction. The ptrace approach isn't suitable for kprobes because the breakpoints would have to be moved back, and the icache flushed, everytime the probe is hit to let normal code execution resume, which would have a significant performance impact. It is also racy on SMP since another CPU could, with the right timing, sail through the probe point without being caught. Because ptrace single-stepping always result in a different process to be scheduled, the concern for performance is much less significant. On the other hand, the kprobes approach isn't (currently) suitable for ptrace because it has no provision for proper user space memory protection and translation, and even if that was implemented, the gain wouldn't be worth the added complexity in the ptrace path compared to the current approach. So, until kprobes does support user space, both kprobes and ptrace are best kept independent and separate. Signed-off-by: Quentin Barnes <qbarnes@gmail.com> Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26[ARM] pxa: skip registers saving/restoring if entering standby modeeric miao1-15/+18
registers are retained during standby mode, thus it's not necessary to save/restore and checksum Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26[ARM] pxa: fix PXA27x resumeRussell King1-1/+1
When PXA27x wakes up, tick_resume_oneshot() tries to set a timer interrupt to occur immediately. Since PXA27x requires at least MIN_OSCR_DELTA, this causes us to flag an error. tick_program_event() then increments the next event time by min_delta_ns. However, by the time we get back to programming the next event, the OSCR has incremented such that we fail again. We repeatedly retry, but the OSCR is too fast for us - we never catch up, so we never break out of the loop - resulting in us never apparantly resuming. Fix this by doubling min_delta_ns. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26[ARM] pxa: Avoid fiddling with CKEN register on suspendRussell King2-8/+0
The PXA manuals indicate that when in standby or sleep modes, clocks to peripherals are shut off by the processor itself. Eg: PXA270 standby: "In standby mode, all clocks are disabled except those for the power manager and the RTC." PXA270 sleep: "In sleep mode, all clocks are disabled to the processor and to all peripherals except the RTC." PXA255 sleep: "In Sleep Mode, all processor and peripheral clocks are disabled, except the RTC." Therefore, it should be safe to leave the clock enable register alone prior to entering low power modes for these SoCs. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26[ARM] pxa: Add PXA3 standby code hooked into the IRQ wake schemeRussell King2-0/+303
Wakeup sources on PXA3 are enabled at two levels. First, the MFP configuration has to be set to enable which edges a specific pin will trigger a wakeup. The pin also has to be routed to a functional unit. Lastly, the functional unit must be enabled as a wakeup source in the appropriate AD*ER registers (AD2D0ER for standby resume.) This doesn't fit well with the IRQ wake scheme - we currently do a best effort conversion from IRQ numbers to functional unit wake enable bits. For instance, there's several USB client related enable bits but there's no corresponding IRQs to determine which you'd want. Conversely, there's a single enable bit covering several functional units. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>