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2020-06-26x86: copy_fpstate_to_sigframe(): have fpregs_soft_get() use kernel bufferAl Viro1-6/+6
... then copy_to_user() the results Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-06-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller95-330/+964
Minor overlapping changes in xfrm_device.c, between the double ESP trailing bug fix setting the XFRM_INIT flag and the changes in net-next preparing for bonding encryption support. Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-25riscv: Fixup __vdso_gettimeofday broke dynamic ftraceGuo Ren1-0/+3
For linux-5.8-rc1, enable ftrace of riscv will cause boot panic: [ 2.388980] Run /sbin/init as init process [ 2.529938] init[39]: unhandled signal 4 code 0x1 at 0x0000003ff449e000 [ 2.531078] CPU: 0 PID: 39 Comm: init Not tainted 5.8.0-rc1-dirty #13 [ 2.532719] epc: 0000003ff449e000 ra : 0000003ff449e954 sp : 0000003fffedb900 [ 2.534005] gp : 00000000000e8528 tp : 0000003ff449d800 t0 : 000000000000001e [ 2.534965] t1 : 000000000000000a t2 : 0000003fffedb89e s0 : 0000003fffedb920 [ 2.536279] s1 : 0000003fffedb940 a0 : 0000003ff43d4b2c a1 : 0000000000000000 [ 2.537334] a2 : 0000000000000001 a3 : 0000000000000000 a4 : fffffffffbad8000 [ 2.538466] a5 : 0000003ff449e93a a6 : 0000000000000000 a7 : 0000000000000000 [ 2.539511] s2 : 0000000000000000 s3 : 0000003ff448412c s4 : 0000000000000010 [ 2.541260] s5 : 0000000000000016 s6 : 00000000000d0a30 s7 : 0000003fffedba70 [ 2.542152] s8 : 0000000000000000 s9 : 0000000000000000 s10: 0000003fffedb960 [ 2.543335] s11: 0000000000000000 t3 : 0000000000000000 t4 : 0000003fffedb8a0 [ 2.544471] t5 : 0000000000000000 t6 : 0000000000000000 [ 2.545730] status: 0000000000004020 badaddr: 00000000464c457f cause: 0000000000000002 [ 2.549867] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004 [ 2.551267] CPU: 0 PID: 1 Comm: init Not tainted 5.8.0-rc1-dirty #13 [ 2.552061] Call Trace: [ 2.552626] [<ffffffe00020374a>] walk_stackframe+0x0/0xc4 [ 2.553486] [<ffffffe0002039f4>] show_stack+0x40/0x4c [ 2.553995] [<ffffffe00054a6ae>] dump_stack+0x7a/0x98 [ 2.554615] [<ffffffe00020b9b8>] panic+0x114/0x2f4 [ 2.555395] [<ffffffe00020ebd6>] do_exit+0x89c/0x8c2 [ 2.555949] [<ffffffe00020f930>] do_group_exit+0x3a/0x90 [ 2.556715] [<ffffffe000219e08>] get_signal+0xe2/0x6e6 [ 2.557388] [<ffffffe000202d72>] do_notify_resume+0x6a/0x37a [ 2.558089] [<ffffffe000201c16>] ret_from_exception+0x0/0xc "ra:0x3ff449e954" is the return address of "call _mcount" in the prologue of __vdso_gettimeofday(). Without proper relocate, pc jmp to 0x0000003ff449e000 (vdso map base) with a illegal instruction trap. The solution comes from arch/arm64/kernel/vdso/Makefile: CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) - CC_FLAGS_SCS is ShadowCallStack feature in Clang and only implemented for arm64, no use for riscv. Fixes: ad5d1122b82f ("riscv: use vDSO common flow to reduce the latency of the time-related functions") Cc: stable@vger.kernel.org Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Reviewed-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-06-25riscv: Add extern declarations for vDSO time-related functionsVincent Chen1-0/+6
Add extern declarations for vDSO time-related functions to notify the compiler these functions will be used in somewhere to avoid "no previous prototype" compile warning. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-06-25riscv: Add -fPIC option to CFLAGS_vgettimeofday.oVincent Chen1-1/+1
The time related vDSO functions use a variable, vdso_data, to access the vDSO data page to get the system time information. Because the vdso_data for CFLAGS_vgettimeofday.o is an external variable defined in vdso.o, the CFLAGS_vgettimeofday.o should be compiled with -fPIC to ensure that vdso_data is addressable. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-06-25arm64: Add KRYO{3,4}XX silver CPU cores to SSB safelistSai Prakash Ranjan1-0/+2
QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on Cortex-A55 and are SSB safe, hence add them to SSB safelist -> arm64_ssb_cpus[]. Reported-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200625103123.7240-1-saiprakash.ranjan@codeaurora.org Signed-off-by: Will Deacon <will@kernel.org>
2020-06-25Merge tag 's390-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linuxLinus Torvalds3-2/+5
Pull s390 fixes from Heiko Carstens: - Fix kernel crash on system call single stepping. - Make sure early program check handler is executed with DAT on to avoid an endless program check loop. - Add __GFP_NOWARN flag to debug feature to avoid user triggerable allocation failure messages. * tag 's390-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/debug: avoid kernel warning on too large number of pages s390/kasan: fix early pgm check handler execution s390: fix system call single stepping
2020-06-25Merge drm/drm-next into drm-intel-next-queuedJani Nikula2943-59942/+79460
Catch up with upstream, in particular to get c1e8d7c6a7a6 ("mmap locking API: convert mmap_sem comments"). Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2020-06-25arm64: perf: Report the PC value in REGS_ABI_32 modeJiping Ma1-3/+22
A 32-bit perf querying the registers of a compat task using REGS_ABI_32 will receive zeroes from w15, when it expects to find the PC. Return the PC value for register dwarf register 15 when returning register values for a compat task to perf. Cc: <stable@vger.kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Jiping Ma <jiping.ma2@windriver.com> Link: https://lore.kernel.org/r/1589165527-188401-1-git-send-email-jiping.ma2@windriver.com [will: Shuffled code and added a comment] Signed-off-by: Will Deacon <will@kernel.org>
2020-06-25mips: Return proper error code from console ->setup() hookAndy Shevchenko1-1/+3
For unifying console ->setup() handling, which is poorly documented, return error code, rather than non-zero arbitrary number. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Petr Mladek <pmladek@suse.com> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Petr Mladek <pmladek@suse.com> Link: https://lore.kernel.org/r/20200618164751.56828-2-andriy.shevchenko@linux.intel.com
2020-06-25x86/entry: Fix #UD vs WARN morePeter Zijlstra1-34/+38
vmlinux.o: warning: objtool: exc_invalid_op()+0x47: call to probe_kernel_read() leaves .noinstr.text section Since we use UD2 as a short-cut for 'CALL __WARN', treat it as such. Have the bare exception handler do the report_bug() thing. Fixes: 15a416e8aaa7 ("x86/entry: Treat BUG/WARN as NMI-like entries") Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Andy Lutomirski <luto@kernel.org> Link: https://lkml.kernel.org/r/20200622114713.GE577403@hirez.programming.kicks-ass.net
2020-06-25x86/entry: Increase entry_stack size to a full pagePeter Zijlstra1-1/+1
Marco crashed in bad_iret with a Clang11/KCSAN build due to overflowing the stack. Now that we run C code on it, expand it to a full page. Suggested-by: Andy Lutomirski <luto@amacapital.net> Reported-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Lai Jiangshan <jiangshanlai@gmail.com> Tested-by: Marco Elver <elver@google.com> Link: https://lkml.kernel.org/r/20200618144801.819246178@infradead.org
2020-06-25x86/entry: Fixup bad_iret vs noinstrPeter Zijlstra2-3/+7
vmlinux.o: warning: objtool: fixup_bad_iret()+0x8e: call to memcpy() leaves .noinstr.text section Worse, when KASAN there is no telling what memcpy() actually is. Force the use of __memcpy() which is our assmebly implementation. Reported-by: Marco Elver <elver@google.com> Suggested-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Marco Elver <elver@google.com> Link: https://lkml.kernel.org/r/20200618144801.760070502@infradead.org
2020-06-25x86/msr: Filter MSR writesBorislav Petkov1-0/+69
Add functionality to disable writing to MSRs from userspace. Writes can still be allowed by supplying the allow_writes=on module parameter. The kernel will be tainted so that it shows in oopses. Having unfettered access to all MSRs on a system is and has always been a disaster waiting to happen. Think performance counter MSRs, MSRs with sticky or locked bits, MSRs making major system changes like loading microcode, MTRRs, PAT configuration, TSC counter, security mitigations MSRs, you name it. This also destroys all the kernel's caching of MSR values for performance, as the recent case with MSR_AMD64_LS_CFG showed. Another example is writing MSRs by mistake by simply typing the wrong MSR address. System freezes have been experienced that way. In general, poking at MSRs under the kernel's feet is a bad bad idea. So log writing to MSRs by default. Longer term, such writes will be disabled by default. If userspace still wants to do that, then proper interfaces should be defined which are under the kernel's control and accesses to those MSRs can be synchronized and sanitized properly. [ Fix sparse warnings. ] Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Tested-by: Sean Christopherson <sean.j.christopherson@intel.com> Link: https://lkml.kernel.org/r/20200612105026.GA22660@zn.tnic
2020-06-25MIPS: checksum: fix sparse flooding on asm/checksum.hAlexander Lobakin1-2/+2
csum_fold() in MIPS' asm/checksum.h is another source of sparse flooding when building different networking source code. The thing is that only half of __wsum <--> u32 casts inside the function is forced, which is insufficient. Add all necessary forced typecasting to stop floods and simplify actual bug hunting. Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25MIPS: io: fix sparse flood on asm/io.hAlexander Lobakin7-24/+30
MIPS MMIO macros for byteswapping from/to hardware endianness are a bit tricky because they use cpu_to_le{16,32,64}() in both directions. This generates a lot of questions from sparse as __le{16,32,64} types are 'restricted' and direct cast is forbidden in order to prevent messing up the byteorder. As MMIO ops are used in almost every single driver, this leads to console flooding and complicates bug hunting. We could fix it in a more proper way, i.e. separate from device / to device byteswap macros and expand __BUILD_MEMORY_*(), but this seems redundant and will produce code duplication. Instead, just expand the existing *ioswab*() macros with forced typecasting to stop floods. Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25MIPS: generic/ip32: io: fix __mem_ioswabq()Alexander Lobakin2-2/+2
*readq() family operates with u64 arguments, so they need 64-bit byteswaps. Correct macros for Generic MIPS and IP-32 to match other machines' implementations. Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25MIPS: ingenic: gcw0: Fix HP detection GPIO.João H. Spies1-1/+1
Previously marked as active high, but is in reality active low. Cc: stable@vger.kernel.org Fixes: b1bfdb660516 ("MIPS: ingenic: DTS: Update GCW0 support") Signed-off-by: João H. Spies <jhlspies@gmail.com> Tested-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25ARM: dts: bcm2711: Add firmware clocks nodeMaxime Ripard1-0/+5
Now that we have a clock driver for the clocks exposed by the firmware, let's add the device tree nodes for it. Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/9a6f113140b3115150bfb18ecb248a48d58562cf.1592210452.git-series.maxime@cerno.tech
2020-06-25ARM: tegra: The Tegra30 SDHCI is not backwards-compatibleThierry Reding1-4/+4
The SDHCI on Tegra30 is in fact not backwards-compatible with the instantiation found on earlier SoCs. Drop the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: The Tegra30 DC is not backwards-compatibleThierry Reding1-1/+1
The display controller on Tegra30 is in fact not backwards-compatible with the instantiation found on earlier SoCs. Drop the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Remove spurious comma from node nameThierry Reding1-1/+1
This was probably left there by mistake or perhaps was a typo in the first place. Remove it. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add parent clock to DSI outputThierry Reding2-2/+6
The DSI output needs to specify a parent clock that will be used to drive both the output and the display controller. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard names for SRAM nodesThierry Reding2-4/+4
SRAM nodes should be named sram@<unit-address> to match the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: seaboard: Use standard battery bindingsThierry Reding1-3/+3
Seaboard uses a non-existing, possibly obsoleted, binding for the battery. Move to the standard binding which seems to be a super- set of the odl binding. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard names for LED nodesThierry Reding1-1/+1
LED nodes should be named led-* to match the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use numeric unit-addressesThierry Reding1-1/+1
Unit-addresses should be numeric. This fixes a validation failure seen using the json-schema tooling. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: medcom-wide: Remove extra panel power supplyThierry Reding1-1/+1
Simple panels can only have a single power supply. The second listed supply is not needed because it is also the input supply of the first supply and therefore will always be on at the same time. In retrospect the panel probably doesn't qualify as simple since it apparently does need both of these supplies, even if in the case of the Medcom Wide it isn't necessary to explicitly hook them up. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use proper unit-addresses for OPPsThierry Reding4-496/+496
Use commas rather than underscores to separate the various parts of the unit-address in CPU OPPs to make them properly validate under the json- schema bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing clock-names for SDHCI controllersThierry Reding3-0/+12
The Tegra SDHCI controllers need to have a clock-names property according to the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Fix order of XUSB controller clocksThierry Reding1-2/+2
This is purely to make the json-schema validation tools happy because they cannot deal with string arrays that may be in arbitrary order. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add #reset-cells to Tegra124 memory controllerThierry Reding1-0/+1
The memory controller exposes a set of memory client resets and needs to specify the #reset-cells property in order to advertise the number of cells needed to describe each of the resets. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing panel power suppliesThierry Reding3-1/+3
Both Nyan boards as well as Venice2 are missing panel power supplies. Add them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add micro-USB A/B port on Jetson TK1Thierry Reding1-0/+6
Run the micro-USB A/B port on Jetson TK1 in host mode by default. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use proper tuple notationThierry Reding5-82/+89
Tuple boundaries should be marked by < and > to make it clear which cells are part of the same tuple. This also helps the json-schema based validation tooling to properly parse this data. While at it, also remove the "immovable" bit from PCI addresses. All of these addresses are in fact "movable". Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard name for Ethernet devicesThierry Reding4-4/+4
Ethernet device should be named "ethernet@<unit-address>". Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing #sound-dai-cells property to codecsThierry Reding5-0/+5
Audio codecs need a #sound-dai-cells property, so add one to the audio codecs on various Tegra-based boards that don't have one. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing #phy-cells property to USB PHYsThierry Reding4-0/+11
USB PHYs must have a #phy-cells property, so add one to the Tegra USB PHYs which don't have one. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Tegra114 SDHCI is not backwards-compatibleThierry Reding1-4/+4
The SDHCI controller instantiated on Tegra114 is not backwards- compatible with the version on Tegra30, so remove the corresponding compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Rename sdhci nodes to mmcThierry Reding33-64/+64
The new json-schema based validation tools require SD/MMC controller nodes to be named mmc. Rename all references to them. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Drop display controller parent clocks on Tegra124Thierry Reding1-6/+4
The parent clocks are determined by the output that will be used, not by the display controller that drives the output. On previous generations a simple RGB output used to be part of the display controller and hence an explicit parent clock needed to be assigned to the display controller to drive the RGB output. Starting with Tegra124, that RGB output has been dropped and the parent clock can therefore be removed from the display controller device tree nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-24arm64: dts: sc7180: Add interconnect for QUP and QSPIAkash Asthana1-0/+127
Add interconnect ports for GENI QUPs and QSPI to set bus capabilities. Signed-off-by: Akash Asthana <akashast@codeaurora.org> Link: https://lore.kernel.org/r/1592908737-7068-9-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24MIPS: dts: ocelot: describe the load/save GPIOQuentin Schulz1-1/+11
This patch adds a description of the load/save GPIN pin, used in the VSC8584 PHY for timestamping operations. The related pinctrl description is also added. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24arm64: dts: ipq8074: enable USB supportSivaprakash Murugesan2-0/+191
IPQ8074 has two super speed usb ports, add phy and dwc3 nodes to enable them. Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1591625479-4483-6-git-send-email-sivaprak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24um: line, remove put_charJiri Slaby4-8/+0
um's put_char only calls write. And the tty layer/disciplines do the same if put_char is NULL. So we can safely remove this put_char wrapper. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Cc: Jeff Dike <jdike@addtoit.com> Cc: Richard Weinberger <richard@nod.at> Cc: Anton Ivanov <anton.ivanov@cambridgegreys.com> Link: https://lore.kernel.org/r/20200615074856.18949-1-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-24ARM: vdso: Don't use gcc plugins for building vgettimeofday.cAlexander Popov1-1/+1
Don't use gcc plugins for building arch/arm/vdso/vgettimeofday.c to avoid unneeded instrumentation. As previously discussed[1]: arm_ssp_per_task_plugin.c 32-bit ARM only (but likely needs disabling for 32-bit ARM vDSO?) cyc_complexity_plugin.c compile-time reporting only latent_entropy_plugin.c this shouldn't get triggered for the vDSO (no __latent_entropy nor __init attributes in vDSO), but perhaps explicitly disabling it would be a sensible thing to do, just for robustness? randomize_layout_plugin.c this shouldn't get triggered (again, lacking attributes), but should likely be disabled too. sancov_plugin.c This should be tracking the KCOV directly (see scripts/Makefile.kcov), which is already disabled here. structleak_plugin.c This should be fine in the vDSO, but there's no security boundary here, so it wouldn't be important to KEEP it enabled. [1] https://lore.kernel.org/lkml/20200610073046.GA15939@willie-the-truck/ Signed-off-by: Alexander Popov <alex.popov@linux.com> Link: https://lore.kernel.org/r/20200624123330.83226-3-alex.popov@linux.com Signed-off-by: Kees Cook <keescook@chromium.org>
2020-06-24arm64: kpti: Add KRYO{3, 4}XX silver CPU cores to kpti safelistSai Prakash Ranjan1-0/+2
QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on Cortex-A55 and are meltdown safe, hence add them to kpti_safe_list[]. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/20200624123406.3472-1-saiprakash.ranjan@codeaurora.org Signed-off-by: Will Deacon <will@kernel.org>
2020-06-24arm64: Don't insert a BTI instruction at inner labelsJean-Philippe Brucker1-6/+0
Some ftrace features are broken since commit 714a8d02ca4d ("arm64: asm: Override SYM_FUNC_START when building the kernel with BTI"). For example the function_graph tracer: $ echo function_graph > /sys/kernel/debug/tracing/current_tracer [ 36.107016] WARNING: CPU: 0 PID: 115 at kernel/trace/ftrace.c:2691 ftrace_modify_all_code+0xc8/0x14c When ftrace_modify_graph_caller() attempts to write a branch at ftrace_graph_call, it finds the "BTI J" instruction inserted by SYM_INNER_LABEL() instead of a NOP, and aborts. It turns out we don't currently need the BTI landing pads inserted by SYM_INNER_LABEL: * ftrace_call and ftrace_graph_call are only used for runtime patching of the active tracer. The patched code is not reached from a branch. * install_el2_stub is reached from a CBZ instruction, which doesn't change PSTATE.BTYPE. * __guest_exit is reached from B instructions in the hyp-entry vectors, which aren't subject to BTI checks either. Remove the BTI annotation from SYM_INNER_LABEL. Fixes: 714a8d02ca4d ("arm64: asm: Override SYM_FUNC_START when building the kernel with BTI") Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200624112253.1602786-1-jean-philippe@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2020-06-24arm64: vdso: Don't use gcc plugins for building vgettimeofday.cAlexander Popov1-1/+1
Don't use gcc plugins for building arch/arm64/kernel/vdso/vgettimeofday.c to avoid unneeded instrumentation. Signed-off-by: Alexander Popov <alex.popov@linux.com> Link: https://lore.kernel.org/r/20200624123330.83226-4-alex.popov@linux.com Signed-off-by: Will Deacon <will@kernel.org>
2020-06-24arm64: vdso: Only pass --no-eh-frame-hdr when linker supports itWill Deacon1-2/+3
Commit 87676cfca141 ("arm64: vdso: Disable dwarf unwinding through the sigreturn trampoline") unconditionally passes the '--no-eh-frame-hdr' option to the linker when building the native vDSO in an attempt to prevent generation of the .eh_frame_hdr section, the presence of which has been implicated in segfaults originating from the libgcc unwinder. Unfortunately, not all versions of binutils support this option, which has been shown to cause build failures in linux-next: | CALL scripts/atomic/check-atomics.sh | CALL scripts/checksyscalls.sh | LD arch/arm64/kernel/vdso/vdso.so.dbg | ld: unrecognized option '--no-eh-frame-hdr' | ld: use the --help option for usage information | arch/arm64/kernel/vdso/Makefile:64: recipe for target | 'arch/arm64/kernel/vdso/vdso.so.dbg' failed | make[1]: *** [arch/arm64/kernel/vdso/vdso.so.dbg] Error 1 | arch/arm64/Makefile:175: recipe for target 'vdso_prepare' failed | make: *** [vdso_prepare] Error 2 Only link the vDSO with '--no-eh-frame-hdr' when the linker supports it. If we end up with the section due to linker defaults, the absence of CFI information in the sigreturn trampoline will prevent the unwinder from breaking. Link: https://lore.kernel.org/r/7a7e31a8-9a7b-2428-ad83-2264f20bdc2d@hisilicon.com Fixes: 87676cfca141 ("arm64: vdso: Disable dwarf unwinding through the sigreturn trampoline") Reported-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Will Deacon <will@kernel.org>