linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2019-12-11	clk: imx: pll14xx: fix clk_pll14xx_wait_lock	Peng Fan	1	-1/+1
2019-12-09	clk: imx: clk-imx7ulp: Add missing sentinel of ulp_div_table	Peng Fan	1	-0/+1
2019-12-09	clk: imx: clk-composite-8m: add lock to gate/mux	Peng Fan	1	-0/+2
2019-12-01	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	10	-301/+208
2019-11-27	Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next	Stephen Boyd	10	-287/+208
2019-11-04	clk: imx: imx8mq: fix sys3_pll_out_sels	Peng Fan	1	-2/+2
2019-10-28	clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock	Fancy Fang	1	-2/+1
2019-10-28	clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM	Leonard Crestez	2	-2/+2
2019-10-28	clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code	Peng Fan	1	-4/+4
2019-10-28	clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code	Peng Fan	1	-6/+6
2019-10-28	clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code	Peng Fan	1	-4/+4
2019-10-28	clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code	Peng Fan	1	-2/+2
2019-10-26	clk: imx7ulp: Correct DDR clock mux options	Anson Huang	1	-2/+2
2019-10-26	clk: imx7ulp: Correct system clock source option #7	Anson Huang	1	-1/+1
2019-10-25	clk: imx: imx8mq: mark sys1/2_pll as fixed clock	Peng Fan	1	-6/+2
2019-10-25	clk: imx: imx8mn: mark sys_pll1/2 as fixed clock	Peng Fan	1	-26/+20
2019-10-25	clk: imx: imx8mm: mark sys_pll1/2 as fixed clock	Peng Fan	1	-26/+20
2019-10-25	clk: imx8mn: Define gates for pll1/2 fixed dividers	Leonard Crestez	1	-19/+38
2019-10-25	clk: imx8mm: Define gates for pll1/2 fixed dividers	Leonard Crestez	1	-19/+38
2019-10-25	clk: imx8mq: Define gates for pll1/2 fixed dividers	Leonard Crestez	1	-20/+41
2019-10-16	clk: imx: imx8mn: drop unused pll enum	Peng Fan	1	-14/+0
2019-10-14	clk: imx: clk-pll14xx: Make two variables static	YueHaibing	1	-2/+2
2019-10-14	clk: imx8mq: Add VIDEO2_PLL clock	Laurentiu Palcu	1	-0/+4
2019-10-06	clk: imx8mn: Use common 1443X/1416X PLL clock structure	Anson Huang	2	-79/+12
2019-10-06	clk: imx8mm: Move 1443X/1416X PLL clock structure to common place	Anson Huang	3	-77/+43
2019-10-06	clk: imx: pll14xx: Fix quick switch of S/K parameter	Leonard Crestez	1	-32/+8
2019-09-17	clk: imx: imx8mn: fix pll mux bit	Peng Fan	1	-22/+10
2019-09-17	clk: imx: imx8mm: fix pll mux bit	Peng Fan	1	-22/+10
2019-09-17	clk: imx: clk-pll14xx: unbypass PLL by default	Peng Fan	1	-0/+5
2019-09-17	clk: imx: pll14xx: avoid glitch when set rate	Peng Fan	1	-1/+21
2019-08-24	clk: imx: imx8mn: fix audio pll setting	Peng Fan	1	-2/+2
2019-08-19	clk: imx8mn: Add necessary frequency support for ARM PLL table	Anson Huang	1	-0/+2
2019-08-19	clk: imx8mn: Add missing rate_count assignment for each PLL structure	Anson Huang	1	-0/+7
2019-08-19	clk: imx8mn: fix int pll clk gate	Peng Fan	1	-6/+6
2019-08-19	clk: imx8mn: Add GIC clock	Leonard Crestez	1	-0/+5
2019-08-19	clk: imx8mn: Fix incorrect parents	Leonard Crestez	1	-7/+7
2019-08-19	clk: imx8mm: Fix incorrect parents	Leonard Crestez	1	-4/+4
2019-08-19	clk: imx8mq: Fix sys3 pll references	Leonard Crestez	1	-56/+56
2019-08-12	clk: imx8mq: Unregister clks when of_clk_add_provider failed	Anson Huang	1	-1/+9
2019-08-12	clk: imx8mm: Unregister clks when of_clk_add_provider failed	Anson Huang	1	-1/+6
2019-08-03	clk: imx8mq: Mark AHB clock as critical	Abel Vesa	1	-1/+2
2019-08-03	clk: imx8mn: Keep uart clocks on for early console	Anson Huang	1	-0/+10
2019-08-03	clk: imx: Remove unused function statement	Anson Huang	1	-1/+0
2019-08-03	clk: imx7ulp: Make sure earlycon's clock is enabled	Anson Huang	1	-0/+31
2019-08-03	clk: imx8mm: Switch to platform driver	Abel Vesa	1	-21/+36
2019-08-03	clk: imx: imx8mm: fix audio pll setting	Peng Fan	1	-2/+2
2019-08-03	clk: imx8mm: GPT1 clock mux option #5 should be sys_pll1_80m	Anson Huang	1	-1/+1
2019-08-03	clk: imx8mm: Fix typo of pwm3 clock's mux option #4	Anson Huang	1	-1/+1
2019-08-03	clk: imx: Remove unused clk based API	Abel Vesa	1	-24/+0
2019-08-03	clk: imx8mq: set correct parent for usb ctrl clocks	Li Jun	1	-2/+2