Age | Commit message (Expand) | Author | Files | Lines |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 35 | -315/+35 |
2019-05-21 | treewide: Add SPDX license identifier - Makefile/Kconfig | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 1 | -0/+1 |
2019-05-07 | Merge branches 'clk-renesas', 'clk-qcom', 'clk-mtk', 'clk-milbeaut' and 'clk-imx' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 20 | -33/+3392 |
2019-04-25 | clk: mediatek: add clock driver for MT8516 | ![](https://seccdn.libravatar.org/avatar/45e49e72baaa252a0b32dd45ed03a0fd?s=13&d=retro) Fabien Parent | 3 | -0/+824 |
2019-04-12 | clk: mediatek: fix clk-gate flag setting | ![](https://seccdn.libravatar.org/avatar/cff7b1b3de1f6393d49f6a23b9793241?s=13&d=retro) Weiyi Lu | 1 | -2/+1 |
2019-04-11 | clk: mediatek: Allow changing PLL rate when it is off | ![](https://seccdn.libravatar.org/avatar/2629ab303d7065def649d2e920c93d32?s=13&d=retro) James Liao | 1 | -11/+2 |
2019-04-11 | clk: mediatek: Add MT8183 clock support | ![](https://seccdn.libravatar.org/avatar/cff7b1b3de1f6393d49f6a23b9793241?s=13&d=retro) Weiyi Lu | 15 | -0/+2196 |
2019-04-11 | clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_data | ![](https://seccdn.libravatar.org/avatar/cff7b1b3de1f6393d49f6a23b9793241?s=13&d=retro) Weiyi Lu | 2 | -6/+12 |
2019-04-11 | clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_data | ![](https://seccdn.libravatar.org/avatar/0f99b78ba235e502ec36b48b464ec603?s=13&d=retro) Owen Chen | 2 | -4/+13 |
2019-04-11 | clk: mediatek: Add new clkmux register API | ![](https://seccdn.libravatar.org/avatar/0f99b78ba235e502ec36b48b464ec603?s=13&d=retro) Owen Chen | 3 | -1/+314 |
2019-04-11 | clk: mediatek: Disable tuner_en before change PLL rate | ![](https://seccdn.libravatar.org/avatar/0f99b78ba235e502ec36b48b464ec603?s=13&d=retro) Owen Chen | 1 | -14/+34 |
2019-03-08 | Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -2/+6 |
2019-03-08 | Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 7 | -41/+75 |
2019-02-26 | clk: mediatek: correct cpu clock name for MT8173 SoC | ![](https://seccdn.libravatar.org/avatar/9112e5d8f9b6e7a3487310204218e569?s=13&d=retro) Seiya Wang | 1 | -2/+2 |
2019-02-26 | clk: mediatek: Mark bus and DRAM related clocks as critical | ![](https://seccdn.libravatar.org/avatar/f3f3819a3bdf57191b8c1e0cdb5059cb?s=13&d=retro) Jasper Mattsson | 1 | -25/+43 |
2019-02-26 | clk: mediatek: Add flags to mtk_gate | ![](https://seccdn.libravatar.org/avatar/f3f3819a3bdf57191b8c1e0cdb5059cb?s=13&d=retro) Jasper Mattsson | 4 | -3/+7 |
2019-02-26 | clk: mediatek: Add MUX_FLAGS macro | ![](https://seccdn.libravatar.org/avatar/f3f3819a3bdf57191b8c1e0cdb5059cb?s=13&d=retro) Jasper Mattsson | 1 | -2/+6 |
2019-02-25 | clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel | ![](https://seccdn.libravatar.org/avatar/c7ef083d9117abb2a873be90c1a87d6d?s=13&d=retro) chunhui dai | 1 | -2/+2 |
2019-02-25 | clk: mediatek: add MUX_GATE_FLAGS_2 | ![](https://seccdn.libravatar.org/avatar/c7ef083d9117abb2a873be90c1a87d6d?s=13&d=retro) chunhui dai | 2 | -7/+15 |
2019-02-22 | clk: mediatek: fix platform_no_drv_owner.cocci warnings | ![](https://seccdn.libravatar.org/avatar/99fadc7a66f85bd5c0262cb31d311d89?s=13&d=retro) YueHaibing | 1 | -1/+0 |
2019-02-05 | clk: mediatek: update clock driver of MT2712 | ![](https://seccdn.libravatar.org/avatar/cff7b1b3de1f6393d49f6a23b9793241?s=13&d=retro) Weiyi Lu | 1 | -2/+6 |
2018-12-05 | clk: mediatek: fix the PCIe MAC clock parent | ![](https://seccdn.libravatar.org/avatar/7e70d4cdcebf1bbe81941ea93d8a395f?s=13&d=retro) Ryder Lee | 1 | -2/+2 |
2018-11-30 | clk: mediatek: Drop more __init markings for driver probe | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -2/+2 |
2018-11-30 | clk: mediatek: Drop __init from mtk_clk_register_cpumuxes() | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -4/+4 |
2018-11-29 | clk: mediatek: add clock support for MT7629 SoC | ![](https://seccdn.libravatar.org/avatar/7e70d4cdcebf1bbe81941ea93d8a395f?s=13&d=retro) Ryder Lee | 5 | -0/+1064 |
2018-08-30 | clk: mediatek: remove unused array audio_parents | ![](https://seccdn.libravatar.org/avatar/c355fbcee7cc0c3af0720ef10032ad50?s=13&d=retro) Colin Ian King | 1 | -5/+0 |
2018-06-04 | Merge branches 'clk-hisi-usb', 'clk-silent-bulk', 'clk-mtk-hdmi', 'clk-mtk-mali' and 'clk-imx6ul-ccosr' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 4 | -2/+108 |
2018-05-15 | clk: mediatek: add g3dsys support for MT2701 and MT7623 | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 3 | -0/+102 |
2018-05-15 | clk: mediatek: correct the clocks for MT2701 HDMI PHY module | ![](https://seccdn.libravatar.org/avatar/7e70d4cdcebf1bbe81941ea93d8a395f?s=13&d=retro) Ryder Lee | 1 | -2/+6 |
2018-04-06 | Merge branches 'clk-mediatek', 'clk-hisi', 'clk-allwinner', 'clk-ux500' and 'clk-renesas' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 5 | -8/+215 |
2018-03-20 | clk: mediatek: add audsys support for MT2701 | ![](https://seccdn.libravatar.org/avatar/7e70d4cdcebf1bbe81941ea93d8a395f?s=13&d=retro) Ryder Lee | 3 | -0/+193 |
2018-03-20 | clk: mediatek: add devm_of_platform_populate() for MT7622 audsys | ![](https://seccdn.libravatar.org/avatar/7e70d4cdcebf1bbe81941ea93d8a395f?s=13&d=retro) Ryder Lee | 1 | -1/+13 |
2018-03-19 | clk: mediatek: update clock driver of MT2712 | ![](https://seccdn.libravatar.org/avatar/cff7b1b3de1f6393d49f6a23b9793241?s=13&d=retro) Weiyi Lu | 1 | -14/+55 |
2018-03-19 | clk: mediatek: update missing clock data for MT7622 audsys | ![](https://seccdn.libravatar.org/avatar/7e70d4cdcebf1bbe81941ea93d8a395f?s=13&d=retro) Ryder Lee | 1 | -0/+1 |
2018-03-19 | clk: mediatek: fix PWM clock source by adding a fixed-factor clock | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 1 | -7/+8 |
2018-01-10 | clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 3 | -9/+2 |
2017-12-26 | clk: mediatek: Fix all warnings for missing struct clk_onecell_data | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 1 | -0/+1 |
2017-12-21 | clk: mediatek: group drivers under indpendent menu | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 1 | -46/+50 |
2017-11-17 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux | ![](https://seccdn.libravatar.org/avatar/fb47627bc8c0bcdb36321edfbf02e916?s=13&d=retro) Linus Torvalds | 17 | -4/+3520 |
2017-11-02 | License cleanup: add SPDX GPL-2.0 license identifier to files with no license | ![](https://seccdn.libravatar.org/avatar/cbd18395260b6be2575187286a262f9a?s=13&d=retro) Greg Kroah-Hartman | 1 | -0/+1 |
2017-11-02 | clk: mediatek: add clock support for MT7622 SoC | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 6 | -0/+1334 |
2017-11-02 | clk: mediatek: add the option for determining PLL source clock | ![](https://seccdn.libravatar.org/avatar/3c86478acaca4a47e8a2614a49edb124?s=13&d=retro) Chen Zhong | 2 | -1/+5 |
2017-11-02 | clk: mediatek: mark mtk_infrasys_init_early __init | ![](https://seccdn.libravatar.org/avatar/f1897d8cf2fe6c8e75a0c9add2d05b0c?s=13&d=retro) Arnd Bergmann | 1 | -1/+1 |
2017-11-02 | clk: mediatek: Add MT2712 clock support | ![](https://seccdn.libravatar.org/avatar/cff7b1b3de1f6393d49f6a23b9793241?s=13&d=retro) weiyi.lu@mediatek.com | 12 | -2/+2180 |
2017-07-21 | clk: Convert to using %pOF instead of full_name | ![](https://seccdn.libravatar.org/avatar/ee1e7f40e65828eb76184367a6353704?s=13&d=retro) Rob Herring | 3 | -3/+3 |
2017-07-17 | clk: mediatek: fixed static checker warning in clk_cpumux_get_parent call | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 1 | -4/+0 |
2017-06-19 | clk: mediatek: export cpu multiplexer clock for MT8173 SoCs | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 1 | -0/+23 |
2017-06-19 | clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 1 | -0/+8 |
2017-06-19 | clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't work | ![](https://seccdn.libravatar.org/avatar/ac0ecc32123cfa9373d631fbce251514?s=13&d=retro) Sean Wang | 3 | -1/+151 |
2017-04-21 | clk: mediatek: add mt2701 ethernet reset | ![](https://seccdn.libravatar.org/avatar/ce7bcfa250b6af9bc2cedd7c07a36106?s=13&d=retro) John Crispin | 1 | -0/+2 |