Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2015-07-28 | Merge branch 'cleanup-clk-h-includes' into clk-next | 4 | -2/+6 | |
2015-07-28 | clk: mediatek: Add MT8173 MMPLL change rate support | 3 | -6/+42 | |
2015-07-28 | clk: mediatek: Fix calculation of PLL rate settings | 1 | -2/+2 | |
2015-07-28 | clk: mediatek: Fix PLL registers setting flow | 1 | -9/+12 | |
2015-07-20 | clk: mediatek: Properly include clk.h | 4 | -2/+6 | |
2015-07-06 | clk: mediatek: mt8173: Fix enabling of critical clocks | 1 | -5/+21 | |
2015-06-04 | clk: mediatek: Fix apmixedsys clock registration | 2 | -2/+2 | |
2015-05-19 | clk: mediatek: Initialize clk_init_data | 2 | -2/+2 | |
2015-05-05 | clk: mediatek: Add basic clocks for Mediatek MT8173. | 2 | -0/+831 | |
2015-05-05 | clk: mediatek: Add basic clocks for Mediatek MT8135. | 2 | -0/+645 | |
2015-05-05 | clk: mediatek: Add reset controller support | 3 | -0/+108 | |
2015-05-05 | clk: mediatek: Add initial common clock support for Mediatek SoCs. | 6 | -0/+898 |