Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-09-26 | clk: meson: clk-pll: remove od parameters | 1 | -1/+7 | |
2018-07-09 | clk: meson: add gen_clk | 1 | -1/+3 | |
2018-07-09 | clk: meson-axg: add clocks required by pcie driver | 1 | -1/+5 | |
2018-03-13 | clk: meson: add fdiv clock gates | 1 | -1/+6 | |
2018-03-13 | clk: meson: add mpll pre-divider | 1 | -1/+2 | |
2018-03-13 | clk: meson: axg: add hifi pll clock | 1 | -1/+1 | |
2018-03-13 | clk: meson: split divider and gate part of mpll | 1 | -1/+5 | |
2017-12-14 | clk: meson-axg: add clock controller drivers | 1 | -0/+126 |