linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2019-10-14	clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-3/+1
2019-10-08	clk: meson: axg_audio: add sm1 support	Jerome Brunet	2	-30/+574
2019-10-08	clk: meson: axg-audio: provide clk top signal name	Jerome Brunet	2	-4/+17
2019-10-08	clk: meson: axg-audio: prepare sm1 addition	Jerome Brunet	1	-685/+782
2019-10-08	clk: meson: axg-audio: fix regmap last register	Jerome Brunet	1	-1/+1
2019-10-08	clk: meson: axg-audio: remove useless defines	Jerome Brunet	1	-4/+0
2019-10-01	clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes	Neil Armstrong	1	-0/+9
2019-10-01	clk: meson: g12a: fix cpu clock rate setting	Neil Armstrong	1	-2/+2
2019-10-01	clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate	Martin Blumenstingl	1	-0/+1
2019-09-19	Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' into clk-next	Stephen Boyd	1	-2/+5
2019-08-26	clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks	Neil Armstrong	2	-1/+61
2019-08-26	clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock	Neil Armstrong	2	-1/+198
2019-08-26	clk: meson: g12a: add support for SM1 GP1 PLL	Neil Armstrong	2	-1/+310
2019-08-20	clk: meson: axg-audio: add g12a reset support	Jerome Brunet	2	-2/+106
2019-08-16	clk: meson: axg-audio: Don't reference clk_init_data after registration	Stephen Boyd	1	-2/+5
2019-08-09	Merge branch 'v5.4/dt' into v5.4/drivers	Jerome Brunet	1	-1/+0
2019-08-09	clk: meson: g12a: expose CPUB clock ID for G12B	Neil Armstrong	1	-1/+0
2019-08-09	clk: meson: g12a: add notifiers to handle cpu clock change	Neil Armstrong	1	-54/+481
2019-08-09	clk: meson: add g12a cpu dynamic divider driver	Neil Armstrong	4	-0/+99
2019-07-29	clk: meson: remove clk input helper	Alexandre Mergnat	4	-72/+0
2019-07-29	clk: meson: remove ee input bypass clocks	Alexandre Mergnat	3	-13/+0
2019-07-29	clk: meson: clk-regmap: migrate to new parent description method	Alexandre Mergnat	5	-6/+21
2019-07-29	clk: meson: meson8b: migrate to the new parent description method	Alexandre Mergnat	1	-211/+496
2019-07-29	clk: meson: axg: migrate to the new parent description method	Alexandre Mergnat	1	-60/+144
2019-07-29	clk: meson: gxbb: migrate to the new parent description method	Alexandre Mergnat	1	-203/+451
2019-07-29	clk: meson: g12a: migrate to the new parent description method	Alexandre Mergnat	1	-394/+693
2019-07-29	clk: meson: remove ao input bypass clocks	Alexandre Mergnat	3	-46/+0
2019-07-29	clk: meson: axg-aoclk: migrate to the new parent description method	Alexandre Mergnat	1	-26/+37
2019-07-29	clk: meson: gxbb-aoclk: migrate to the new parent description method	Alexandre Mergnat	1	-28/+27
2019-07-29	clk: meson: g12a-aoclk: migrate to the new parent description method	Alexandre Mergnat	1	-31/+50
2019-07-29	clk: meson: axg-audio: migrate to the new parent description method	Alexandre Mergnat	2	-142/+120
2019-07-25	clk: meson: g12a: fix hifi typo in mali parent_names	Alexandre Mergnat	1	-1/+1
2019-07-17	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	10	-23/+1074
2019-06-28	Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	3	-8/+8
2019-06-11	clk: meson: g12a: mark fclk_div3 as critical	Neil Armstrong	1	-0/+10
2019-06-11	clk: meson: g12a: Add support for G12B CPUB clocks	Neil Armstrong	2	-1/+801
2019-06-11	clk: meson-g12a: add temperature sensor clocks	Guillaume La Roque	2	-1/+33
2019-06-11	clk: meson: meson8b: add the cts_i958 clock	Martin Blumenstingl	2	-1/+25
2019-06-11	clk: meson: meson8b: add the cts_mclk_i958 clocks	Martin Blumenstingl	2	-1/+69
2019-06-11	clk: meson: meson8b: add the cts_amclk clocks	Martin Blumenstingl	2	-1/+69
2019-05-21	treewide: Add SPDX license identifier - Makefile/Kconfig	Thomas Gleixner	2	-0/+2
2019-05-20	clk: meson: g12a: add controller register init	Jerome Brunet	1	-1/+7
2019-05-20	clk: meson: eeclk: add init regs	Jerome Brunet	2	-0/+5
2019-05-20	clk: meson: g12a: add mpll register init sequences	Jerome Brunet	1	-0/+24
2019-05-20	clk: meson: mpll: add init callback and regs	Jerome Brunet	2	-11/+26
2019-05-20	clk: meson: axg: spread spectrum is on mpll2	Jerome Brunet	1	-5/+5
2019-05-20	clk: meson: gxbb: no spread spectrum on mpll0	Jerome Brunet	1	-5/+0
2019-05-20	clk: meson: mpll: properly handle spread spectrum	Jerome Brunet	2	-3/+7
2019-05-20	clk: meson: meson8b: fix a typo in the VPU parent names array variable	Martin Blumenstingl	1	-5/+5
2019-05-20	clk: meson: fix MPLL 50M binding id typo	Jerome Brunet	2	-3/+3