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path: root/drivers/clk/renesas (follow)
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2021-07-12dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitionsBiju Das3-64/+93
2021-07-12clk: renesas: r9a07g044: Add P2 Clock supportBiju Das2-0/+5
2021-07-12clk: renesas: r9a07g044: Fix P1 ClockBiju Das1-3/+3
2021-07-12clk: renesas: r9a07g044: Rename divider tableBiju Das1-3/+4
2021-07-12clk: renesas: rzg2l: Add multi clock PM supportBiju Das1-22/+29
2021-06-10clk: renesas: Add support for R9A07G044 SoCLad Prabhakar5-0/+141
2021-06-10clk: renesas: Add CPG core wrapper for RZ/G2L SoCLad Prabhakar4-0/+883
2021-05-27clk: renesas: r8a77995: Add ZA2 clockKuninori Morimoto1-0/+1
2021-05-27clk: renesas: cpg-mssr: Make srstclr[] comment block consistentGeert Uytterhoeven1-1/+3
2021-05-27clk: renesas: cpg-mssr: Remove unused [RM]MSTPCR() definitionsGeert Uytterhoeven1-6/+0
2021-05-11clk: renesas: r9a06g032: Switch to .determine_rate()Geert Uytterhoeven1-12/+13
2021-05-11clk: renesas: div6: Implement range checkingGeert Uytterhoeven1-1/+7
2021-05-11clk: renesas: div6: Consider all parents for requested rateGeert Uytterhoeven1-3/+32
2021-05-11clk: renesas: div6: Switch to .determine_rate()Geert Uytterhoeven1-5/+7
2021-05-11clk: renesas: div6: Simplify src mask handlingGeert Uytterhoeven1-20/+11
2021-05-11clk: renesas: div6: Use clamp() instead of clamp_t()Geert Uytterhoeven1-1/+1
2021-05-11clk: renesas: rcar-usb2-clock-sel: Fix error handling in .probe()Dinghao Liu1-9/+15
2021-05-11clk: renesas: r8a779a0: Add ISPCS clocksNiklas Söderlund1-0/+4
2021-05-11clk: renesas: rcar-gen3: Add boost support to Z clocksGeert Uytterhoeven1-4/+20
2021-05-11clk: renesas: rcar-gen3: Add custom clock for PLLsGeert Uytterhoeven1-19/+128
2021-05-11clk: renesas: rcar-gen3: Increase Z clock accuracyGeert Uytterhoeven1-2/+2
2021-05-11clk: renesas: rcar-gen3: Grammar s/dependent of/dependent on/Geert Uytterhoeven1-1/+1
2021-05-11clk: renesas: rcar-gen3: Remove superfluous masking in cpg_z_clk_set_rate()Geert Uytterhoeven1-2/+1
2021-05-11clk: renesas: rcar-gen3: Make cpg_z_clk.mask u32Geert Uytterhoeven1-1/+1
2021-05-11clk: renesas: rcar-gen3: Update Z clock rate formula in commentsGeert Uytterhoeven1-1/+2
2021-03-30clk: renesas: Zero init clk_init_dataGeert Uytterhoeven8-16/+11
2021-03-24clk: renesas: Couple of spelling fixesBhaskar Chowdhury1-2/+2
2021-03-12clk: renesas: r8a779a0: Add CMT clocksWolfram Sang1-0/+4
2021-03-12clk: renesas: r8a7795: Add TMU clocksNiklas Söderlund1-0/+6
2021-03-10clk: renesas: r8a779a0: Add TSC clockNiklas Söderlund1-0/+1
2021-03-10clk: renesas: r8a779a0: Add TMU clocksWolfram Sang1-0/+6
2021-03-08clk: renesas: r8a77965: Add DAB clockFabrizio Castro1-0/+1
2021-03-08clk: renesas: r8a77990: Add DAB clockFabrizio Castro1-0/+1
2021-01-28clk: renesas: cpg-mssr: Fix formatting issues for 'smstpcr_saved's documentationLee Jones1-2/+2
2021-01-25clk: renesas: r8a779a0: Add RAVB clocksWolfram Sang1-0/+6
2021-01-25clk: renesas: r8a779a0: Add I2C clocksWolfram Sang1-0/+7
2021-01-12clk: renesas: r8a779a0: Add SYS-DMAC clocksGeert Uytterhoeven1-0/+2
2021-01-12clk: renesas: r8a779a0: Add SDHI supportWolfram Sang2-2/+16
2021-01-12clk: renesas: rcar-gen3: Factor out CPG libraryWolfram Sang5-251/+309
2021-01-12clk: renesas: rcar-gen3: Remove cpg_quirks access when registering SD clockWolfram Sang1-9/+10
2021-01-12clk: renesas: r8a779a0: Add MSIOF clocksGeert Uytterhoeven1-0/+6
2021-01-12clk: renesas: r8a779a0: Add PFC/GPIO clocksGeert Uytterhoeven1-0/+5
2021-01-07clk: renesas: r8a779a0: Fix parent of CBFUSA clockGeert Uytterhoeven1-1/+1
2021-01-07clk: renesas: r8a779a0: Remove non-existent S2 clockGeert Uytterhoeven1-1/+0
2021-01-07clk: renesas: r8a779a0: Add HSCIF supportWolfram Sang1-0/+4
2020-12-28clk: renesas: r8a779a0: Add RWDT clocksWolfram Sang1-0/+9
2020-12-28clk: renesas: r8a779a0: Add VSPX clock supportKieran Bingham1-0/+4
2020-12-28clk: renesas: r8a779a0: Add VSPD clock supportKieran Bingham1-0/+2
2020-12-28clk: renesas: r8a779a0: Add FCPVD clock supportKieran Bingham1-0/+2
2020-12-28clk: renesas: r8a77995: Add TMU clocksNiklas Söderlund1-0/+5