linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2018-07-06	clk: rockchip: add clock controller for px30	Elaine Zhang	1	-1/+40
2018-07-06	clk: rockchip: add support for half divider	Elaine Zhang	1	-0/+85
2017-03-22	clk: rockchip: rename RK1108 to RV1108	Andy Yan	1	-14/+14
2017-01-05	clk: rockchip: add clock controller for rk3328	Elaine Zhang	1	-0/+18
2017-01-02	clk: rockchip: add new pll-type for rk3328	Elaine Zhang	1	-0/+1
2017-01-02	clk: rockchip: add a clock-type for muxes based in the grf	Heiko Stuebner	1	-0/+21
2016-11-16	clk: rockchip: add clock controller for rk1108	Shawn Lin	1	-0/+15
2016-09-01	clk: rockchip: add new clock-type for the ddrclk	Lin Huang	1	-0/+33
2016-08-08	clk: rockchip: use general clock flag when registering pll	Heiko Stübner	1	-1/+1
2016-05-09	clk: rockchip: simplify GRF handling in pll clocks	Heiko Stuebner	1	-1/+0
2016-04-20	clk: rockchip: fix checkpatch warning in core code	Heiko Stuebner	1	-1/+1
2016-04-19	clk: rockchip: drop unnecessary header comment	Heiko Stuebner	1	-1/+0
2016-03-28	clk: rockchip: add clock controller for the RK3399	Xing Zheng	1	-1/+21
2016-03-27	clk: rockchip: fix warning reported by kernel-doc	Shawn Lin	1	-4/+5
2016-03-27	clk: rockchip: remove mux_core_reg from rockchip_cpuclk_reg_data	Shawn Lin	1	-1/+0
2016-03-27	clk: rockchip: add new pll-type for rk3399 and similar socs	Xing Zheng	1	-1/+2
2016-03-27	clk: rockchip: Add support for multiple clock providers	Xing Zheng	1	-13/+38
2016-03-27	clk: rockchip: allow varying mux parameters for cpuclk pll-sources	Xing Zheng	1	-0/+6
2016-03-27	clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type	Xing Zheng	1	-0/+16
2016-02-04	clk: rockchip: add a factor clock type	Heiko Stuebner	1	-0/+28
2016-01-02	Merge branch 'clk-rockchip' into clk-next	Michael Turquette	1	-1/+1
2016-01-02	clk: rockchip: fix section mismatches with new child-clocks	Heiko Stübner	1	-1/+1
2015-12-23	Merge branch 'clk-rockchip' into clk-next	Michael Turquette	1	-0/+19
2015-12-23	clk: rockchip: handle mux dependency of fractional dividers	Heiko Stuebner	1	-0/+19
2015-12-21	clk: rockchip: only enter pll slow-mode directly before reboots on rk3288	Heiko Stuebner	1	-1/+1
2015-12-12	clk: rockchip: add clock controller for rk3228	Jeffy Chen	1	-1/+10
2015-11-23	clk: rockchip: add clock controller for rk3036	Xing Zheng	1	-1/+8
2015-11-23	clk: rockchip: add new pll-type for rk3036 and similar socs	Xing Zheng	1	-0/+23
2015-07-28	clk: rockchip: Fix PLL bandwidth	Douglas Anderson	1	-4/+4
2015-07-28	Merge branch 'cleanup-clk-h-includes' into clk-next	Stephen Boyd	1	-2/+2
2015-07-20	clk: rockchip: Properly include clk.h	Stephen Boyd	1	-2/+2
2015-07-06	clk: rockchip: add rk3368 clock controller	Heiko Stuebner	1	-0/+16
2015-07-06	clk: rockchip: add support for phase inverters	Heiko Stuebner	1	-0/+20
2015-07-06	clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant	Heiko Stuebner	1	-0/+20
2015-07-06	clk: rockchip: protect register macros against multipart values	Heiko Stuebner	1	-8/+8
2015-06-04	clk: make several parent names const	Uwe Kleine-König	1	-10/+10
2015-04-12	clk: don't use __initconst for non-const arrays	Uwe Kleine-König	1	-2/+2
2014-11-28	clk: rockchip: Add support for the mmc clock phases using the framework	Alexandru M Stan	1	-0/+23
2014-11-25	clk: rockchip: add optional sync to pll rate parameters	Heiko Stuebner	1	-0/+6
2014-11-25	clk: rockchip: add ability to specify pll-specific flags	Heiko Stuebner	1	-2/+5
2014-10-29	clk: rockchip: change PLL setting for better clock jitter	Kever Yang	1	-0/+9
2014-10-01	clk: rockchip: add restart handler	Heiko Stübner	1	-0/+1
2014-09-27	clk: rockchip: add new clock-type for the cpuclk	Heiko Stuebner	1	-0/+37
2014-09-02	clk: rockchip: protect critical clocks from getting disabled	Heiko Stübner	1	-0/+1
2014-07-13	clk: rockchip: add clock controller for rk3288	Heiko Stübner	1	-0/+9
2014-07-13	clk: rockchip: add reset controller	Heiko Stübner	1	-0/+14
2014-07-13	clk: rockchip: add clock type for pll clocks and pll used on rk3066	Heiko Stübner	1	-0/+74
2014-07-13	clk: rockchip: add basic infrastructure for clock branches	Heiko Stübner	1	-0/+250