aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_device_info.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2020-07-14drm/i915/dg1: add initial DG-1 definitionsAbdiel Janulgue1-0/+1
2020-07-14drm/i915: Add has_master_unit_irq flagStuart Summers1-0/+1
2020-07-08drm/i915/sseu: Move sseu_info under gt_infoVenkata Sandeep Dhanalakota1-3/+0
2020-07-08drm/i915/sseu: Move sseu detection and dump to intel_sseuDaniele Ceraolo Spurio1-2/+0
2020-07-08drm/i915: Move the engine mask to intel_gt_infoDaniele Ceraolo Spurio1-6/+1
2020-07-08drm/i915: Move engine-related mmio init to engines_init_mmioDaniele Ceraolo Spurio1-2/+0
2020-06-09drm/i915/rkl: RKL uses ABOX0 for pixel transfersMatt Roper1-0/+2
2020-06-04drm/i915/rkl: Disable PSR2José Roberto de Souza1-0/+1
2020-06-02drm/i915: Identify Cometlake platformChris Wilson1-0/+1
2020-05-19drm/i915/rkl: Add RKL platform info and PCI idsMatt Roper1-0/+1
2020-05-14drm/i915: Store CS timestamp frequency in HzVille Syrjälä1-1/+1
2020-04-18drm/i915: Refactor setting dma info to a common helperMichael J. Ruhl1-0/+2
2020-04-03drm/i915: Store cpu_transcoder_mask in device infoVille Syrjälä1-0/+1
2020-02-19drm/i915: Read rawclk_freq earlierChris Wilson1-0/+2
2020-02-16drm/i915: Track hw reported context runtimeTvrtko Ursulin1-0/+1
2020-02-05drm/i915: Manipulate DBuf slices properlyStanislav Lisovskiy1-0/+1
2019-12-09drm/i915: Flesh out device_info pretty printerChris Wilson1-4/+5
2019-10-29drm/i915/display/cnl+: Handle fused off DSCJosé Roberto de Souza1-0/+1
2019-10-29drm/i915/display: Handle fused off HDCPJosé Roberto de Souza1-0/+1
2019-10-25drm/i915: Add is_dgfx to device infoJosé Roberto de Souza1-0/+1
2019-10-18drm/i915: enumerate and init each supported regionAbdiel Janulgue1-0/+2
2019-09-23drm/i915/dsb: feature flag added for display state buffer.Animesh Manna1-0/+1
2019-09-12drm/i915: convert device info num_pipes to pipe_maskJani Nikula1-1/+1
2019-07-31drm/i915/tgl: Tigerlake only has global MOCS registersMichel Thierry1-0/+1
2019-07-25drm/i915/uc: Unify uC platform checkDaniele Ceraolo Spurio1-1/+1
2019-07-12drm/i915: Add modular FIAAnusha Srivatsa1-0/+1
2019-07-11drm/i915/tgl: add initial Tiger Lake definitionsDaniele Ceraolo Spurio1-0/+2
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula1-2/+2
2019-06-17drm/i915: Change gamma/degamma_lut_size data type to u32Shashank Sharma1-2/+2
2019-06-12drm/i915: Kill INTEL_SUBPLATFORM_AMLVille Syrjälä1-1/+0
2019-06-09drm/i915/guc: always use Command Transport BuffersDaniele Ceraolo Spurio1-1/+0
2019-05-31drm/i915: add force_probe module parameter to replace alpha_supportJani Nikula1-1/+1
2019-05-28drm/i915: Refactor sseu helper functionsStuart Summers1-44/+0
2019-05-28drm/i915: Add macro for SSEU stride calculationStuart Summers1-6/+3
2019-04-24drm/i915: Move GraphicsTechnology files under gt/Chris Wilson1-2/+4
2019-04-24drm/i915: Store the default sseu setup on the engineChris Wilson1-27/+1
2019-04-19drm/i915: Track HAS_RPS alongside HAS_RC6 in the device infoChris Wilson1-0/+1
2019-04-02drm/i915: Move intel_engine_mask_t around for use by i915_request_types.hChris Wilson1-2/+1
2019-04-01drm/i915: Introduce concept of a sub-platformTvrtko Ursulin1-1/+26
2019-03-25drm/i915: stop storing the media fuseDaniele Ceraolo Spurio1-4/+0
2019-03-22drm/i915/ehl: Add ElkhartLake platformBob Paauwe1-0/+1
2019-03-15drm/i915: Drop address size from ppgtt_typeChris Wilson1-1/+0
2019-03-15drm/i915: Record platform specific ppGTT size in intel_device_infoChris Wilson1-2/+4
2019-03-05drm/i915: Store the BIT(engine->id) as the engine's maskChris Wilson1-3/+3
2019-02-05drm/i915: Rename HAS_GMCHRodrigo Vivi1-1/+1
2019-01-30drm/i915: Apply LUT validation checks to platforms more accurately (v3)Matt Roper1-0/+2
2019-01-03drm/i915: Always try to reset the GPU on takeoverChris Wilson1-0/+1
2019-01-02drm/i915: drop intel_device_info_dump()Jani Nikula1-2/+0
2019-01-02drm/i915: pass dev_priv to intel_device_info_runtime_init()Jani Nikula1-1/+1
2019-01-02drm/i915: start moving runtime device info to a separate structJani Nikula1-10/+15