aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_dsi_pll.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2014-12-10drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port CGaurav K Singh1-2/+3
2014-12-05drm/i915: cck reg used for checking DSI Pll lockedGaurav K Singh1-2/+4
2014-12-05drm/i915: Enable DSI PLL for both DSI0 and DSI1 in case of dual linkGaurav K Singh1-0/+3
2014-08-08drm/i915: Align intel_dsi*.c files a bitDaniel Vetter1-4/+4
2014-08-08drm/i915: Add support for Video Burst Mode for MIPI DSIShobhit Kumar1-6/+3
2014-08-07drm/i915: Add correct hw/sw config check for DSI encoderShobhit Kumar1-0/+81
2013-12-11drm/i915: Try harder to get best m, n, p values with minimal errorShobhit Kumar1-10/+20
2013-12-11drm/i915: Compute dsi_clk from pixel clockShobhit Kumar1-58/+31
2013-09-16drm/i915: Use adjusted_mode in DSI PLL calculationsVille Syrjälä1-2/+2
2013-09-04drm/i915: add VLV DSI PLL Calculationsymohanma1-0/+317