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path: root/drivers/net/ethernet/qlogic/qed/qed_fcoe.c (follow)
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2021-10-04qed: Add '_GTT' suffix to the IRO RAM macrosPrabhakar Kushwaha1-8/+6
GTT (Global translation table) is a fast-access window in the BAR into the register space, which only maps certain register addresses. This change helps enforce that only those addresses which are indeed mapped by the GTT are being accessed through it. Adding the '_GTT' suffix to the IRO FW memory (“RAM”) macros that access GTT-able region in FW memories (“RAM”) and use GTT macros to access RAM BAR from drivers. Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: Omkar Kulkarni <okulkarni@marvell.com> Signed-off-by: Shai Malin <smalin@marvell.com> Signed-off-by: Prabhakar Kushwaha <pkushwaha@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-04qed: Split huge qed_hsi.h header fileOmkar Kulkarni1-0/+1
The qed_hsi.h is a huge header file containing HSI (Hardware Software Interface) definitions of storm memory access, debug related, general and management firmware specific. In order to have a better code-organization HSI definition, this patch split the code across multiple files, i.e. - storm memory access HSI : qed_iro_hsi.h - debug related HSI : qed_dbg_hsi.h - Management firmware HSI : qed_mfg_hsi.h - General HSI : qed_hsi.h In addition, this patch also fixes existing checkpatch warnings and few important checks. Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: Shai Malin <smalin@marvell.com> Signed-off-by: Omkar Kulkarni <okulkarni@marvell.com> Signed-off-by: Prabhakar Kushwaha <pkushwaha@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-04qed: Remove e4_ and _e4 from FW HSIShai Malin1-5/+5
The existing qed/qede/qedr/qedi/qedf code uses chip-specific naming in structures, functions, variables and defines in FW HSI (Hardware Software Interface). The new FW version introduced a generic naming convention in HSI in-which the same code will be used across different versions for simpler maintainability. It also eases in providing support for new features. With this patch every "_e4" or "e4_" prefix or suffix is not needed anymore and it will be removed. Reviewed-by: Manish Rangankar <mrangankar@marvell.com> Reviewed-by: Javed Hasan <jhasan@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: Omkar Kulkarni <okulkarni@marvell.com> Signed-off-by: Shai Malin <smalin@marvell.com> Signed-off-by: Prabhakar Kushwaha <pkushwaha@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-06net: qed: sanitize BE/LE data processingAlexander Lobakin1-26/+28
Current code assumes that both host and device operates in Little Endian in lots of places. While this is true for x86 platform, this doesn't mean we should not care about this. This commit addresses all parts of the code that were pointed out by sparse checker. All operations with restricted (__be*/__le*) types are now protected with explicit from/to CPU conversions, even if they're noops on common setups. I'm sure there are more such places, but this implies a deeper code investigation, and is a subject for future works. Signed-off-by: Alexander Lobakin <alobakin@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-30net: qed: update copyright yearsAlexander Lobakin1-0/+1
Set the actual copyright holder and years in all qed source files. Signed-off-by: Alexander Lobakin <alobakin@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-30net: qed: convert to SPDX License IdentifiersAlexander Lobakin1-28/+1
QLogic QED drivers source code is dual licensed under GPL-2.0/BSD-3-Clause. Remove all the boilerplates in the existing code and replace it with the correct SPDX tag. Signed-off-by: Alexander Lobakin <alobakin@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-27qed: FW 8.42.2.0 iscsi/fcoe changesMichal Kalderon1-0/+2
- Remove struct iscsi_slow_path_hdr and field fw_cid from several structs - Remove struct iscsi_spe_func_dstry - Remove fields pbe_page_size_log and pbl_page_size_log from struct iscsi_conn_offload_param Signed-off-by: Manish Rangankar <manish.rangankar@marvell.com> Signed-off-by: Saurav Kashyap <saurav.kashyap@marvell.com> Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-05-26qed: Modify offload protocols to use the affined engineMichal Kalderon1-13/+13
To enable 100g support for offload protocols each PF gets a dedicated engine to work on from the MFW. This patch modifies the code to use the affined hwfn instead of the leading one. The offload protocols require the ll2 to be opened on both engines, and not just the affined hwfn. Signed-off-by: Ariel Elior <ariel.elior@marvell.com> Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-08qed: Fix SPQ entries not returned to pool in error flowsDenis Bolotin1-3/+8
qed_sp_destroy_request() API was added for SPQ users that need to free/return the entry they acquired in their error flows. Signed-off-by: Denis Bolotin <denis.bolotin@cavium.com> Signed-off-by: Michal Kalderon <michal.kalderon@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-07qed: Add support for Unified Fabric Port.Sudarsana Reddy Kalluru1-0/+3
This patch adds driver changes for supporting the Unified Fabric Port (UFP). This is a new paritioning mode wherein MFW provides the set of parameters to be used by the device such as traffic class, outer-vlan tag value, priority type etc. Drivers receives this info via notifications from mfw and configures the hardware accordingly. Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Ariel Elior <ariel.elior@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-02qed*: HSI renaming for different types of HWTomer Tayar1-5/+5
This patch renames defines and structures in the FW HSI files to allow a distinction between different types of HW. Signed-off-by: Ariel Elior <Ariel.Elior@cavium.com> Signed-off-by: Michal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: Chad Dupuis <Chad.Dupuis@cavium.com> Signed-off-by: Manish Rangankar <Manish.Rangankar@cavium.com> Signed-off-by: Tomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-06-02qed: Share additional information with qedfMintz, Yuval1-0/+14
Share several new tidbits with qedf: - wwpn & wwnn - Absolute pf-id [this one is actually meant for qedi as well] - Number of available CQs While we're at it, now that qedf will be aware of the available CQs we can add some validation on the inputs it provides. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-06-01qed: Hold a single array for SBsMintz, Yuval1-1/+4
A PF today holds 2 different arrays - one holding information about the HW configuration and one holding information about the SBs that are used by the protocol drivers. These arrays aren't really connected - e.g., protocol driver initializing a given SB would not mark the same SB as occupied in the HW shadow array. Move into a single array [at least for PFs] - hold the mapping of the driver-protocol SBs on the HW entry which they configure. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-05-21qed: Revise alloc/setup/free flowTomer Tayar1-10/+13
Re-organize the logic that allocates and frees memory of various sub-components of the hw-function - a. No need to pass pointers to said structure as parameters; The internal logic knows exactly where to find/set the data. b. Nullify pointers after cleanup to prevent possible errors to re-entrant code. Signed-off-by: Tomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-05-18qed: Remove unused including <linux/version.h>Wei Yongjun1-1/+0
Remove including <linux/version.h> that is not needed. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-04-06qed: Don't use main-ptt in unrelated flowsRahul Verma1-2/+8
In order to access HW registers driver needs to acquire a PTT entry [mapping between bar memory and internal chip address]. Since acquiring PTT entries could fail [at least in theory] as their number is finite and other flows can hold them, we reserve special PTT entries for 'important' enough flows - ones we want to guarantee that would not be susceptible to such issues. One such special entry is the 'main' PTT which is meant to be used in flows such as chip initialization and de-initialization. However, there are other flows that are also using that same entry for their own purpose, and might run concurrently with the original flows [notice that for most cases using the main-ptt by mistake, such a race is still impossible, at least today]. This patch re-organizes the various functions that currently use the main_ptt in one of two ways: - If a function shouldn't use the main_ptt it starts acquiring and releasing it's own PTT entry and use it instead. Notice if those functions previously couldn't fail, they now can [as acquisition might fail]. - Change the prototypes so that the main_ptt would be received as a parameter [instead of explicitly accessing it]. This prevents the future risk of adding codes that introduces new use-cases for flows using the main_ptt, ones that might be in race with the actual 'main' flows. Signed-off-by: Rahul Verma <Rahul.Verma@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-04-03qed: Revise QM cofigurationAriel Elior1-4/+4
Refactor and clean up the queue manager initialization logic. Also, this adds support for RoC low latency queues, which later would be used for improving RoCE latency in high throughput scenarios. Signed-off-by: Ariel Elior <Ariel.Elior@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-28qed: Use BDQ resource for storage protocolsMintz, Yuval1-9/+21
Until now, qed used some port-defined value as BDQ index for both iSCSI and FCoE. As management firmware now treats BDQ as a resource and tells each PF its BDQ-range, start using a valure from that range instead. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-02-19qed: Add support for hardware offloaded FCoE.Arun Easi1-0/+1014
This adds the backbone required for the various HW initalizations which are necessary for the FCoE driver (qedf) for QLogic FastLinQ 4xxxx line of adapters - FW notification, resource initializations, etc. Signed-off-by: Arun Easi <arun.easi@cavium.com> Signed-off-by: Yuval Mintz <yuval.mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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