aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/staging/rtl8192e (follow)
AgeCommit message (Expand)AuthorFilesLines
2021-04-22staging: rtl8192e: indent statement properlyIan Kewish1-1/+1
2021-04-14staging: rtl8192e: removed multiple blank linesMitali Borkar1-7/+0
2021-04-14staging: rtl8192e: remove unnecessary blank line after close braceMitali Borkar1-2/+0
2021-04-14staging: rtl8192e: remove unnecessary blank line before braceMitali Borkar2-4/+0
2021-04-14staging: rtl8192e: add spaces around binary operatorsMitali Borkar2-8/+8
2021-04-13staging: rtl8192e: remove unnecessary ftrace-like loggingMitali Borkar1-4/+0
2021-04-11staging: rtl8192e: Fix incorrect pointer checkMitali Borkar1-1/+1
2021-04-10staging: rtl8192e: remove unnecesasry f-trace like loggingMitali Borkar1-1/+0
2021-04-10staging: rtl8192e: replace comparison to NULL by boolMitali Borkar1-3/+3
2021-04-07staging: rtl8192e: rtl8192E_dev: remove unused variableJiapeng Chong1-3/+3
2021-04-05staging: rtl8192e: move const after staticDeborah Brouwer1-2/+2
2021-04-05Merge 5.12-rc6 into staging-nextGreg Kroah-Hartman2-2/+2
2021-03-23staging: rtl8192e: Change state information from u16 to u8Atul Gopinathan1-1/+1
2021-03-23staging: rtl8192e: Fix incorrect source in memcpy()Atul Gopinathan1-1/+1
2021-03-15Merge 5.12-rc3 into staging-nextGreg Kroah-Hartman2-3/+5
2021-03-10staging: rtl8192e: remove redundant variable shadowingNikolay Kyx1-5/+3
2021-03-10staging: rtl8192e: reformat rx_ts_record structWilliam Durand1-7/+7
2021-03-10staging: rtl8192e: rename RxLastFragNum to rx_last_frag_num in rx_ts_record structWilliam Durand2-3/+3
2021-03-10staging: rtl8192e: rename RxLastSeqNum to rx_last_seq_num in rx_ts_record structWilliam Durand2-3/+3
2021-03-10staging: rtl8192e: rename RxAdmittedBARecord to rx_admitted_ba_record in rx_ts_record structWilliam Durand3-8/+8
2021-03-10staging: rtl8192e: rename RxPktPendingTimer to rx_pkt_pending_timer in rx_ts_record structWilliam Durand3-10/+10
2021-03-10staging: rtl8192e: rename RxPendingPktList to rx_pending_pkt_list in rx_ts_record structWilliam Durand3-12/+12
2021-03-10staging: rtl8192e: rename RxTimeoutIndicateSeq to rx_timeout_indicate_seq in rx_ts_record structWilliam Durand3-9/+9
2021-03-10staging: rtl8192e: rename RxIndicateSeq to rx_indicate_seq in rx_ts_record structWilliam Durand3-30/+30
2021-03-10staging: rtl8192e: rename TsCommonInfo to ts_common_info in rx_ts_record structWilliam Durand3-7/+7
2021-03-10staging: rtl8192e: reformat bss_ht structWilliam Durand1-9/+9
2021-03-10staging: rtl8192e: rename bdHT1R to bd_ht_1r in bss_ht structWilliam Durand2-5/+5
2021-03-10staging: rtl8192e: rename RT2RT_HT_Mode to rt2rt_ht_mode in bss_ht structWilliam Durand4-8/+8
2021-03-10staging: rtl8192e: rename bdRT2RTLongSlotTime to bd_rt2rt_long_slot_time in bss_ht structWilliam Durand4-7/+6
2021-03-10staging: rtl8192e: rename bdRT2RTAggregation to bd_rt2rt_aggregation in bss_ht structWilliam Durand3-9/+9
2021-03-10staging: rtl8192e: rename bdBandWidth to bd_bandwidth in bss_ht structWilliam Durand2-3/+3
2021-03-10staging: rtl8192e: rename bdHTSpecVer to bd_ht_spec_ver in bss_ht structWilliam Durand3-8/+8
2021-03-10staging: rtl8192e: rename bdHTInfoLen to bd_ht_info_len in bss_ht structWilliam Durand4-14/+14
2021-03-10staging: rtl8192e: rename bdHTInfoBuf to bd_ht_info_buf in bss_ht structWilliam Durand4-11/+12
2021-03-10staging: rtl8192e: rename bdHTCapLen to bd_ht_cap_len in bss_ht structWilliam Durand4-12/+12
2021-03-10staging: rtl8192e: rename bdHTCapBuf to bd_ht_cap_buf in bss_ht structWilliam Durand5-15/+16
2021-03-10staging: rtl8192e: rename bdSupportHT to bd_support_ht in bss_ht structWilliam Durand4-12/+12
2021-03-10staging: rtl8192e: remove blank line in bss_ht structWilliam Durand1-1/+0
2021-03-10staging: rtl8192e: fix alignment issues in rtllib_wx.cWilliam Durand1-24/+18
2021-03-10staging: rtl8192e: reformat ba_record structWilliam Durand1-4/+4
2021-03-10staging: rtl8192e: rename BaStartSeqCtrl to ba_start_seq_ctrl in ba_record structWilliam Durand3-11/+11
2021-03-10staging: rtl8192e: rename BaTimeoutValue to ba_timeout_value in ba_record structWilliam Durand2-7/+7
2021-03-10staging: rtl8192e: rename BaParamSet to ba_param_set in ba_record structWilliam Durand2-15/+15
2021-03-10staging: rtl8192e: rename DialogToken to dialog_token in ba_record structWilliam Durand2-8/+8
2021-03-10staging: rtl8192e: rename bValid to b_valid in ba_record structWilliam Durand3-13/+13
2021-03-10staging: rtl8192e: rename Timer to timer in ba_record structWilliam Durand3-9/+9
2021-03-10staging: rtl8192e: rename TID to tid in delba_param_set unionWilliam Durand2-5/+5
2021-03-10staging: rtl8192e: rename Initiator to initiator in delba_param_set unionWilliam Durand2-3/+3
2021-03-10staging: rtl8192e: rename Reserved to reserved in delba_param_set unionWilliam Durand1-1/+1
2021-03-10staging: rtl8192e: rename shortData to short_data in delba_param_set unionWilliam Durand2-2/+2
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.