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authorLinus Torvalds <torvalds@linux-foundation.org>2025-06-02 10:58:00 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2025-06-02 10:58:00 -0700
commita06079511167984f7d25ff09fdfeb2f1582c85dd (patch)
tree8265ff0d9805b2c9b813c14f75274e54960d7f71 /Documentation/devicetree
parentMerge tag 'hardening-v6.16-rc1-fix1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux (diff)
parentmailbox: qcom-apcs-ipc: Assign OF node to clock controller child device (diff)
downloadlinux-rng-a06079511167984f7d25ff09fdfeb2f1582c85dd.tar.xz
linux-rng-a06079511167984f7d25ff09fdfeb2f1582c85dd.zip
Merge tag 'mailbox-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox
Pull mailbox updates from Jassi Brar: "Core: - misc cleanup sophgo: - add driver for CV18XX series qcom: - add SM7150 APCS compatible - apcs: added separate clock node imx: - fix tx doorbell send microchip: - misc compile option fix mediatek: - Refine GCE_GCTL_VALUE setting" * tag 'mailbox-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox: mailbox: qcom-apcs-ipc: Assign OF node to clock controller child device dt-bindings: mailbox: qcom,apcs: Add separate node for clock-controller dt-bindings: mailbox: qcom: Add the SM7150 APCS compatible mailbox: sophgo: add mailbox driver for CV18XX series SoC dt-bindings: mailbox: add Sophgo CV18XX series SoC mailbox: Use guard/scoped_guard for spinlock mailbox: Use guard/scoped_guard for con_mutex mailbox: Remove devm_mbox_controller_unregister mailbox: Propagate correct error return value mailbox: Not protect module_put with spin_lock_irqsave mailbox: Use dev_err when there is error mailbox: mtk-cmdq: Refine GCE_GCTL_VALUE setting mailbox: imx: Fix TXDB_V2 sending mailbox: mchp-ipc-sbi: Fix COMPILE_TEST build error
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml170
-rw-r--r--Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml60
2 files changed, 179 insertions, 51 deletions
diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
index a58a018f3f7b..ac726136f7e5 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
@@ -49,6 +49,7 @@ properties:
- qcom,qcs615-apss-shared
- qcom,sc7180-apss-shared
- qcom,sc8180x-apss-shared
+ - qcom,sm7150-apss-shared
- qcom,sm8150-apss-shared
- const: qcom,sdm845-apss-shared
- items:
@@ -72,6 +73,7 @@ properties:
description: phandles to the parent clocks of the clock driver
minItems: 2
maxItems: 3
+ deprecated: true
'#mbox-cells':
const: 1
@@ -82,6 +84,23 @@ properties:
clock-names:
minItems: 2
maxItems: 3
+ deprecated: true
+
+ clock-controller:
+ type: object
+ additionalProperties: false
+ properties:
+ clocks:
+ description: phandles to the parent clocks of the clock driver
+ minItems: 2
+ maxItems: 3
+
+ '#clock-cells':
+ enum: [0, 1]
+
+ clock-names:
+ minItems: 2
+ maxItems: 3
required:
- compatible
@@ -90,6 +109,76 @@ required:
additionalProperties: false
+# Clocks should be specified either on the parent node or on the child node
+oneOf:
+ - required:
+ - clock-controller
+ properties:
+ clocks: false
+ clock-names: false
+ '#clock-cells': false
+ - properties:
+ clock-controller: false
+
+$defs:
+ msm8916-apcs-clock-controller:
+ properties:
+ clocks:
+ items:
+ - description: primary pll parent of the clock driver
+ - description: auxiliary parent
+ clock-names:
+ items:
+ - const: pll
+ - const: aux
+ '#clock-cells':
+ const: 0
+
+ msm8939-apcs-clock-controller:
+ properties:
+ clocks:
+ items:
+ - description: primary pll parent of the clock driver
+ - description: auxiliary parent
+ - description: reference clock
+ clock-names:
+ items:
+ - const: pll
+ - const: aux
+ - const: ref
+ '#clock-cells':
+ const: 0
+
+ sdx55-apcs-clock-controller:
+ properties:
+ clocks:
+ items:
+ - description: reference clock
+ - description: primary pll parent of the clock driver
+ - description: auxiliary parent
+ clock-names:
+ items:
+ - const: ref
+ - const: pll
+ - const: aux
+ '#clock-cells':
+ const: 0
+
+ ipq6018-apcs-clock-controller:
+ properties:
+ clocks:
+ items:
+ - description: primary pll parent of the clock driver
+ - description: XO clock
+ - description: GCC GPLL0 clock source
+ clock-names:
+ items:
+ - const: pll
+ - const: xo
+ - const: gpll0
+ '#clock-cells':
+ const: 1
+
allOf:
- if:
properties:
@@ -98,15 +187,10 @@ allOf:
enum:
- qcom,msm8916-apcs-kpss-global
then:
+ $ref: "#/$defs/msm8916-apcs-clock-controller"
properties:
- clocks:
- items:
- - description: primary pll parent of the clock driver
- - description: auxiliary parent
- clock-names:
- items:
- - const: pll
- - const: aux
+ clock-controller:
+ $ref: "#/$defs/msm8916-apcs-clock-controller"
- if:
properties:
@@ -115,17 +199,10 @@ allOf:
enum:
- qcom,msm8939-apcs-kpss-global
then:
+ $ref: "#/$defs/msm8939-apcs-clock-controller"
properties:
- clocks:
- items:
- - description: primary pll parent of the clock driver
- - description: auxiliary parent
- - description: reference clock
- clock-names:
- items:
- - const: pll
- - const: aux
- - const: ref
+ clock-controller:
+ $ref: "#/$defs/msm8939-apcs-clock-controller"
- if:
properties:
@@ -134,17 +211,10 @@ allOf:
enum:
- qcom,sdx55-apcs-gcc
then:
+ $ref: "#/$defs/sdx55-apcs-clock-controller"
properties:
- clocks:
- items:
- - description: reference clock
- - description: primary pll parent of the clock driver
- - description: auxiliary parent
- clock-names:
- items:
- - const: ref
- - const: pll
- - const: aux
+ clock-controller:
+ $ref: "#/$defs/sdx55-apcs-clock-controller"
- if:
properties:
@@ -153,17 +223,10 @@ allOf:
enum:
- qcom,ipq6018-apcs-apps-global
then:
+ $ref: "#/$defs/ipq6018-apcs-clock-controller"
properties:
- clocks:
- items:
- - description: primary pll parent of the clock driver
- - description: XO clock
- - description: GCC GPLL0 clock source
- clock-names:
- items:
- - const: pll
- - const: xo
- - const: gpll0
+ clock-controller:
+ $ref: "#/$defs/ipq6018-apcs-clock-controller"
- if:
properties:
@@ -179,19 +242,7 @@ allOf:
properties:
clocks: false
clock-names: false
-
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,ipq6018-apcs-apps-global
- then:
- properties:
- '#clock-cells':
- const: 1
- else:
- properties:
+ clock-controller: false
'#clock-cells':
const: 0
@@ -219,6 +270,23 @@ examples:
- |
#define GCC_APSS_AHB_CLK_SRC 1
#define GCC_GPLL0_AO_OUT_MAIN 123
+ mailbox@b011000 {
+ compatible = "qcom,qcs404-apcs-apps-global",
+ "qcom,msm8916-apcs-kpss-global", "syscon";
+ reg = <0x0b011000 0x1000>;
+ #mbox-cells = <1>;
+
+ apcs_clk: clock-controller {
+ clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>;
+ clock-names = "pll", "aux";
+ #clock-cells = <0>;
+ };
+ };
+
+ # Example apcs with qcs404 (deprecated: use clock-controller subnode)
+ - |
+ #define GCC_APSS_AHB_CLK_SRC 1
+ #define GCC_GPLL0_AO_OUT_MAIN 123
apcs: mailbox@b011000 {
compatible = "qcom,qcs404-apcs-apps-global",
"qcom,msm8916-apcs-kpss-global", "syscon";
diff --git a/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml
new file mode 100644
index 000000000000..24e126bd3a20
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/sophgo,cv1800b-mailbox.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo CV1800/SG2000 mailbox controller
+
+maintainers:
+ - Yuntao Dai <d1581209858@live.com>
+ - Junhui Liu <junhui.liu@pigmoral.tech>
+
+description:
+ Mailboxes integrated in Sophgo CV1800/SG2000 SoCs have 8 channels, each
+ shipping an 8-byte FIFO. Any processor can write to an arbitrary channel
+ and raise interrupts to receivers. Sending messages to itself is also
+ supported.
+
+properties:
+ compatible:
+ const: sophgo,cv1800b-mailbox
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#mbox-cells":
+ const: 2
+ description: |
+ <&phandle channel target>
+ phandle : Label name of mailbox controller
+ channel : 0-7, Channel index
+ target : 0-3, Target processor ID
+
+ Sophgo CV1800/SG2000 SoCs include the following processors, numbered as:
+ <0> Cortex-A53 (Only available on CV181X/SG200X)
+ <1> C906B
+ <2> C906L
+ <3> 8051
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#mbox-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ mailbox@1900000 {
+ compatible = "sophgo,cv1800b-mailbox";
+ reg = <0x01900000 0x1000>;
+ interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <2>;
+ };