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author | 2024-06-07 21:33:47 +0800 | |
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committer | 2024-06-21 09:35:30 +0300 | |
commit | 2c3499c761e0d695f08463943c1bca95ffc92d68 (patch) | |
tree | 2d25d9524611f37fc33a536fa15fb028564d3b85 /scripts/generate_rust_analyzer.py | |
parent | clk: imx: imx8qxp: Parent should be initialized earlier than the clock (diff) | |
download | linux-rng-2c3499c761e0d695f08463943c1bca95ffc92d68.tar.xz linux-rng-2c3499c761e0d695f08463943c1bca95ffc92d68.zip |
clk: imx: fracn-gppll: update rate table
- Add 1039.5MHz clock for video PLL to fulfill the LVDS display
148.5MHz * 7 requirement
- Add 800MHz clock for ARM PLL
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240607133347.3291040-16-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions