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| author |   Brendan Tam <Brendan.Tam@amd.com> | 2025-03-14 13:09:13 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2025-03-26 17:43:25 -0400 |
| commit | 8058061ed9d6bc259d1e678607b07d259342c08f (patch) | |
| tree | 7841f629048a57dde5230767da6ad289171b0770 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Revert "drm/amd/display: dml2 soc dscclk use DPM table clk setting" (diff) | |
| download | linux-rng-8058061ed9d6bc259d1e678607b07d259342c08f.tar.xz linux-rng-8058061ed9d6bc259d1e678607b07d259342c08f.zip | |
drm/amd/display: prevent hang on link training fail
[Why]
When link training fails, the phy clock will be disabled. However, in
enable_streams, it is assumed that link training succeeded and the
mux selects the phy clock, causing a hang when a register write is made.
[How]
When enable_stream is hit, check if link training failed. If it did, fall
back to the ref clock to avoid a hang and keep the system in a recoverable
state.
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Brendan Tam <Brendan.Tam@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions