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| author |   Adham Faris <afaris@nvidia.com> | 2023-10-12 12:27:48 -0700 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@nvidia.com> | 2023-10-14 10:16:33 -0700 |
| commit | 74a8dadac17e2bce4ae2a092dda3bf1003dc30e7 (patch) | |
| tree | ac37894af07a9319973e3cf6148ae8be03d19eb0 /drivers/net/ethernet/mellanox/mlx5/core/en.h | |
| parent | net/mlx5e: Refactor mlx5e_rss_init() and mlx5e_rss_free() API's (diff) | |
| download | linux-74a8dadac17e2bce4ae2a092dda3bf1003dc30e7.tar.xz linux-74a8dadac17e2bce4ae2a092dda3bf1003dc30e7.zip | |
net/mlx5e: Preparations for supporting larger number of channels
Data center server CPUs number keeps getting larger with time.
Currently, our driver limits the number of channels to 128.
Maximum channels number is enforced and bounded by hardcoded
defines (en.h/MLX5E_MAX_NUM_CHANNELS) even though the device and machine
(CPUs num) can allow more.
Refactor current implementation in order to handle further channels.
The maximum supported channels number will be increased in the followup
patch.
Introduce RQT size calculation/allocation scheme below:
1) Preserve current RQT size of 256 for channels number up to 128 (the
old limit).
2) For greater channels number, RQT size is calculated by multiplying
the channels number by 2 and rounding up the result to the nearest
power of 2. If the calculated RQT size exceeds the maximum supported
size by the NIC, fallback to this maximum RQT size
(1 << log_max_rqt_size).
Since RQT size is no more static, allocate and free the indirection
table SW shadow dynamically.
Signed-off-by: Adham Faris <afaris@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 2b3254e33fe5..be8f62998ac2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -141,7 +141,7 @@ struct page_pool; #define MLX5E_PARAMS_DEFAULT_MIN_RX_WQES_MPW 0x2 #define MLX5E_MIN_NUM_CHANNELS 0x1 -#define MLX5E_MAX_NUM_CHANNELS (MLX5E_INDIR_RQT_SIZE / 2) +#define MLX5E_MAX_NUM_CHANNELS 128 #define MLX5E_TX_CQ_POLL_BUDGET 128 #define MLX5E_TX_XSK_POLL_BUDGET 64 #define MLX5E_SQ_RECOVER_MIN_INTERVAL 500 /* msecs */ @@ -200,7 +200,8 @@ static inline int mlx5e_get_max_num_channels(struct mlx5_core_dev *mdev) { return is_kdump_kernel() ? MLX5E_MIN_NUM_CHANNELS : - min_t(int, mlx5_comp_vectors_max(mdev), MLX5E_MAX_NUM_CHANNELS); + min3(mlx5_comp_vectors_max(mdev), (u32)MLX5E_MAX_NUM_CHANNELS, + (u32)(1 << MLX5_CAP_GEN(mdev, log_max_rqt_size))); } /* The maximum WQE size can be retrieved by max_wqe_sz_sq in |