aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
diff options
context:
space:
mode:
authorShay Drory <shayd@nvidia.com>2023-06-14 09:03:32 +0300
committerSaeed Mahameed <saeedm@nvidia.com>2023-07-26 14:31:04 -0700
commit62752c0bc67f79f064cbe2605054f99d52809e7b (patch)
tree7c3f6be4856b326b1627a62402ddd4a82ec3be0f /drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
parentnet/mlx5: fs_chains: Fix ft prio if ignore_flow_level is not supported (diff)
downloadlinux-62752c0bc67f79f064cbe2605054f99d52809e7b.tar.xz
linux-62752c0bc67f79f064cbe2605054f99d52809e7b.zip
net/mlx5: DR, Fix peer domain namespace setting
The offending patch is based on the assumption that for PFs, mlx5_get_dev_index() is the same as vhca_id. However, this assumption is wrong in case of DPU (ECPF). Fix it by using vhca_id directly, and switch the array of peers to xarray. Fixes: 6d5b7321d8af ("net/mlx5: DR, handle more than one peer domain") Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
index 1622dbbe6b97..6c59de3e28f6 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
@@ -935,7 +935,6 @@ struct mlx5dr_domain_info {
};
struct mlx5dr_domain {
- struct mlx5dr_domain *peer_dmn[MLX5_MAX_PORTS];
struct mlx5_core_dev *mdev;
u32 pdn;
struct mlx5_uars_page *uar;
@@ -956,6 +955,7 @@ struct mlx5dr_domain {
struct list_head dbg_tbl_list;
struct mlx5dr_dbg_dump_info dump_info;
struct xarray definers_xa;
+ struct xarray peer_dmn_xa;
/* memory management statistics */
u32 num_buddies[DR_ICM_TYPE_MAX];
};