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authorYevgeny Kliteynik <kliteyn@nvidia.com>2022-05-26 02:32:49 +0300
committerSaeed Mahameed <saeedm@nvidia.com>2022-10-27 15:50:39 +0100
commitfb628b71fb2a93e5346cbd8c80d254683c08e490 (patch)
tree4fc11f5ce4641d0a4ee51a0d4e3e4443316b741c /drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
parentnet/mlx5: DR, Allocate icm_chunks from their own slab allocator (diff)
downloadlinux-fb628b71fb2a93e5346cbd8c80d254683c08e490.tar.xz
linux-fb628b71fb2a93e5346cbd8c80d254683c08e490.zip
net/mlx5: DR, Allocate htbl from its own slab allocator
SW steering allocates/frees lots of htbl structs. Create a separate kmem_cache and allocate htbls from this allocator. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
index 4f38f0f5b352..b645c0ab9a72 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
@@ -916,6 +916,7 @@ struct mlx5dr_domain {
struct mlx5dr_send_info_pool *send_info_pool_rx;
struct mlx5dr_send_info_pool *send_info_pool_tx;
struct kmem_cache *chunks_kmem_cache;
+ struct kmem_cache *htbls_kmem_cache;
struct mlx5dr_send_ring *send_ring;
struct mlx5dr_domain_info info;
struct xarray csum_fts_xa;
@@ -1162,6 +1163,9 @@ u32 mlx5dr_icm_pool_get_chunk_num_of_entries(struct mlx5dr_icm_chunk *chunk);
u32 mlx5dr_icm_pool_get_chunk_byte_size(struct mlx5dr_icm_chunk *chunk);
u8 *mlx5dr_ste_get_hw_ste(struct mlx5dr_ste *ste);
+struct mlx5dr_ste_htbl *mlx5dr_icm_pool_alloc_htbl(struct mlx5dr_icm_pool *pool);
+void mlx5dr_icm_pool_free_htbl(struct mlx5dr_icm_pool *pool, struct mlx5dr_ste_htbl *htbl);
+
static inline int
mlx5dr_icm_pool_dm_type_to_entry_size(enum mlx5dr_icm_type icm_type)
{