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path: root/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h53
1 files changed, 19 insertions, 34 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
index 31c8fdd3206c..cb20d10288c0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
@@ -125,8 +125,6 @@
SRI(DCN_VM_SYSTEM_APERTURE_LOW_ADDR_LSB, HUBPREQ, id),\
SRI(DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB, HUBPREQ, id),\
SRI(DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB, HUBPREQ, id),\
- SR(DCHUBBUB_SDPIF_FB_BASE),\
- SR(DCHUBBUB_SDPIF_FB_OFFSET),\
SRI(CURSOR_SETTINS, HUBPREQ, id), \
SRI(CURSOR_SURFACE_ADDRESS_HIGH, CURSOR, id), \
SRI(CURSOR_SURFACE_ADDRESS, CURSOR, id), \
@@ -226,14 +224,6 @@
uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB; \
uint32_t DCN_VM_SYSTEM_APERTURE_LOW_ADDR; \
uint32_t DCN_VM_SYSTEM_APERTURE_HIGH_ADDR; \
- uint32_t DCHUBBUB_SDPIF_FB_BASE; \
- uint32_t DCHUBBUB_SDPIF_FB_OFFSET; \
- uint32_t DCN_VM_FB_LOCATION_TOP; \
- uint32_t DCN_VM_FB_LOCATION_BASE; \
- uint32_t DCN_VM_FB_OFFSET; \
- uint32_t DCN_VM_AGP_BASE; \
- uint32_t DCN_VM_AGP_BOT; \
- uint32_t DCN_VM_AGP_TOP; \
uint32_t CURSOR_SETTINS; \
uint32_t CURSOR_SETTINGS; \
uint32_t CURSOR_SURFACE_ADDRESS_HIGH; \
@@ -249,7 +239,8 @@
.field_name = reg_name ## __ ## field_name ## post_fix
/* Mask/shift struct generation macro for all ASICs (including those with reduced functionality) */
-#define HUBP_MASK_SH_LIST_DCN_COMMON(mask_sh)\
+/*1.x, 2.x, and 3.x*/
+#define HUBP_MASK_SH_LIST_DCN_SHARE_COMMON(mask_sh)\
HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_BLANK_EN, mask_sh),\
HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_TTU_DISABLE, mask_sh),\
HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_UNDERFLOW_STATUS, mask_sh),\
@@ -265,7 +256,6 @@
HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, MAX_COMPRESSED_FRAGS, mask_sh),\
HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, SW_MODE, mask_sh),\
HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, META_LINEAR, mask_sh),\
- HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, RB_ALIGNED, mask_sh),\
HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, PIPE_ALIGNED, mask_sh),\
HUBP_SF(HUBPREQ0_DCSURF_SURFACE_PITCH, PITCH, mask_sh),\
HUBP_SF(HUBPREQ0_DCSURF_SURFACE_PITCH, META_PITCH, mask_sh),\
@@ -372,12 +362,17 @@
HUBP_SF(HUBPREQ0_DCN_SURF0_TTU_CNTL0, QoS_RAMP_DISABLE, mask_sh),\
HUBP_SF(HUBPREQ0_DCN_SURF0_TTU_CNTL1, REFCYC_PER_REQ_DELIVERY_PRE, mask_sh),\
HUBP_SF(HUBP0_HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, mask_sh)
-
-#define HUBP_MASK_SH_LIST_DCN(mask_sh)\
- HUBP_MASK_SH_LIST_DCN_COMMON(mask_sh),\
+/*2.x and 1.x only*/
+#define HUBP_MASK_SH_LIST_DCN_COMMON(mask_sh)\
+ HUBP_MASK_SH_LIST_DCN_SHARE_COMMON(mask_sh),\
+ HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, RB_ALIGNED, mask_sh),\
HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG, MPTE_GROUP_SIZE, mask_sh),\
HUBP_SF(HUBP0_DCHUBP_REQ_SIZE_CONFIG_C, MPTE_GROUP_SIZE_C, mask_sh)
+/*2.x and 1.x only*/
+#define HUBP_MASK_SH_LIST_DCN(mask_sh)\
+ HUBP_MASK_SH_LIST_DCN_COMMON(mask_sh)
+
/* Mask/shift struct generation macro for ASICs with VM */
#define HUBP_MASK_SH_LIST_DCN_VM(mask_sh)\
HUBP_SF(HUBPREQ0_NOM_PARAMETERS_0, DST_Y_PER_PTE_ROW_NOM_L, mask_sh),\
@@ -412,8 +407,6 @@
HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_LOW_ADDR_LSB, MC_VM_SYSTEM_APERTURE_LOW_ADDR_LSB, mask_sh),\
HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB, MC_VM_SYSTEM_APERTURE_HIGH_ADDR_MSB, mask_sh),\
HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB, MC_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB, mask_sh),\
- HUBP_SF(DCHUBBUB_SDPIF_FB_BASE, SDPIF_FB_BASE, mask_sh),\
- HUBP_SF(DCHUBBUB_SDPIF_FB_OFFSET, SDPIF_FB_OFFSET, mask_sh),\
HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, MC_VM_SYSTEM_APERTURE_DEFAULT_SYSTEM, mask_sh),\
HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, mask_sh),\
HUBP_SF(HUBPREQ0_DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, mask_sh),\
@@ -434,7 +427,7 @@
HUBP_SF(CURSOR0_CURSOR_HOT_SPOT, CURSOR_HOT_SPOT_Y, mask_sh), \
HUBP_SF(CURSOR0_CURSOR_DST_OFFSET, CURSOR_DST_X_OFFSET, mask_sh)
-#define DCN_HUBP_REG_FIELD_LIST(type) \
+#define DCN_HUBP_REG_FIELD_BASE_LIST(type) \
type HUBP_BLANK_EN;\
type HUBP_DISABLE;\
type HUBP_TTU_DISABLE;\
@@ -459,7 +452,6 @@
type ROTATION_ANGLE;\
type H_MIRROR_EN;\
type SURFACE_PIXEL_FORMAT;\
- type ALPHA_PLANE_EN;\
type SURFACE_FLIP_TYPE;\
type SURFACE_FLIP_MODE_FOR_STEREOSYNC;\
type SURFACE_FLIP_IN_STEREOSYNC;\
@@ -589,18 +581,6 @@
type MC_VM_SYSTEM_APERTURE_HIGH_ADDR_LSB;\
type MC_VM_SYSTEM_APERTURE_LOW_ADDR;\
type MC_VM_SYSTEM_APERTURE_HIGH_ADDR;\
- type SDPIF_FB_TOP;\
- type SDPIF_FB_BASE;\
- type SDPIF_FB_OFFSET;\
- type SDPIF_AGP_BASE;\
- type SDPIF_AGP_BOT;\
- type SDPIF_AGP_TOP;\
- type FB_TOP;\
- type FB_BASE;\
- type FB_OFFSET;\
- type AGP_BASE;\
- type AGP_BOT;\
- type AGP_TOP;\
type DCN_VM_SYSTEM_APERTURE_DEFAULT_SYSTEM;\
type DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB;\
type DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB;\
@@ -632,6 +612,10 @@
type CURSOR_DST_X_OFFSET; \
type OUTPUT_FP
+#define DCN_HUBP_REG_FIELD_LIST(type) \
+ DCN_HUBP_REG_FIELD_BASE_LIST(type);\
+ type ALPHA_PLANE_EN
+
struct dcn_mi_registers {
HUBP_COMMON_REG_VARIABLE_LIST;
};
@@ -677,7 +661,7 @@ void hubp1_program_surface_config(
struct hubp *hubp,
enum surface_pixel_format format,
union dc_tiling_info *tiling_info,
- union plane_size *plane_size,
+ struct plane_size *plane_size,
enum dc_rotation_angle rotation,
struct dc_plane_dcc_param *dcc,
bool horizontal_mirror,
@@ -699,7 +683,7 @@ void hubp1_program_pixel_format(
void hubp1_program_size(
struct hubp *hubp,
enum surface_pixel_format format,
- const union plane_size *plane_size,
+ const struct plane_size *plane_size,
struct dc_plane_dcc_param *dcc);
void hubp1_program_rotation(
@@ -714,7 +698,7 @@ void hubp1_program_tiling(
void hubp1_dcc_control(struct hubp *hubp,
bool enable,
- bool independent_64b_blks);
+ enum hubp_ind_block_size independent_64b_blks);
#ifdef CONFIG_DRM_AMD_DC_DCN2_0
bool hubp1_program_surface_flip_and_addr(
@@ -760,5 +744,6 @@ void hubp1_vready_workaround(struct hubp *hubp,
struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
void hubp1_init(struct hubp *hubp);
+void hubp1_read_state_common(struct hubp *hubp);
#endif