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authorSuraj Jitindar Singh <sjitindarsingh@gmail.com>2017-02-10 16:25:51 +1100
committerDavid Gibson <david@gibson.dropbear.id.au>2017-02-22 11:28:28 +1100
commit86cf1e9fe852e5c322968c2c708a7efa8b7be5d9 (patch)
treea822ee586b21bab11008149a31eca4871f774375 /scripts/qapi-commands.py
parenttarget/ppc: Fix LPCR DPFD mask define (diff)
downloadqemu-86cf1e9fe852e5c322968c2c708a7efa8b7be5d9.tar.xz
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target/ppc/POWER9: Add ISAv3.00 MMU definition
POWER9 processors implement the mmu as defined in version 3.00 of the ISA. Add a definition for this mmu model and set the POWER9 cpu model to use this mmu model. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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