diff options
| author |   Anup Patel <anup.patel@wdc.com> | 2022-02-04 23:16:51 +0530 |
|---|---|---|
| committer |   Alistair Francis <alistair.francis@wdc.com> | 2022-02-16 12:24:19 +1000 |
| commit | ac4b0302b0ca986a759538f453b44037c7b66dd9 (patch) | |
| tree | ef7311e05b51711e5b3136eef78298a3af85dff1 /scripts/qapi/commands.py | |
| parent | target/riscv: Implement AIA xiselect and xireg CSRs (diff) | |
| download | qemu-ac4b0302b0ca986a759538f453b44037c7b66dd9.tar.xz qemu-ac4b0302b0ca986a759538f453b44037c7b66dd9.zip | |
target/riscv: Implement AIA IMSIC interface CSRs
The AIA specification defines IMSIC interface CSRs for easy access
to the per-HART IMSIC registers without using indirect xiselect and
xireg CSRs. This patch implements the AIA IMSIC interface CSRs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Message-id: 20220204174700.534953-16-anup@brainfault.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/qapi/commands.py')
0 files changed, 0 insertions, 0 deletions