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| author |   Martin Anderseck <martin.anderseck@ni.com> | 2024-01-17 11:32:29 +0100 |
|---|---|---|
| committer |   Aki Tomita <121511582+atomita-ni@users.noreply.github.com> | 2024-01-22 12:03:16 -0600 |
| commit | 2a68be6e453d07f51dc1d435fe6bf8061679af19 (patch) | |
| tree | 1f90993b71edc329b5aa0e4f550b7a3284e17237 | |
| parent | ci: Build linux targets for mpm changes (diff) | |
| download | uhd-2a68be6e453d07f51dc1d435fe6bf8061679af19.tar.xz uhd-2a68be6e453d07f51dc1d435fe6bf8061679af19.zip | |
mpm: Fix MTS skip for dual-rate
When using two different master clock rates we skip the multi-tile
synchronization (MTS). Without this change however we compared the
converter rates and not the master clock rates which in some cases led
to MTS running because two different master clock rates still used the
same converter rate. This commit fixes this.
| -rw-r--r-- | mpm/python/usrp_mpm/periph_manager/x4xx_clock_mgr.py | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx_clock_mgr.py b/mpm/python/usrp_mpm/periph_manager/x4xx_clock_mgr.py index 14aa4bca9..7bb988fa0 100644 --- a/mpm/python/usrp_mpm/periph_manager/x4xx_clock_mgr.py +++ b/mpm/python/usrp_mpm/periph_manager/x4xx_clock_mgr.py @@ -1123,8 +1123,11 @@ class X4xxClockManager: self.log.trace("Determining sync settings...") sync_args_result = {} rates = [self.rfdc.get_converter_rate(db_idx) for db_idx in range(2)] - if rates[0] != rates[1]: - self.log.info("Multiple master clock rates detected: Skipping Multi-Tile Synchronization, channels may not be fully synchronized!") + if rates[0] != rates[1] or \ + (len(self._master_clock_rates) > 1 and + self._master_clock_rates[0] != self._master_clock_rates[1]): + self.log.info("Multiple master clock rates detected: Skipping Multi-Tile " + "Synchronization, channels may not be fully synchronized!") return sync_args_result else: db_keys = [('all', 'adc_latency', 'dac_latency')] |