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author | Wade Fife <wade.fife@ettus.com> | 2024-03-14 11:44:56 -0500 |
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committer | Wade Fife <wade.fife@ettus.com> | 2024-03-14 16:35:11 -0500 |
commit | 4b63ca00894944e03e7897f96316ab24cd5411d1 (patch) | |
tree | 09323d7a3eb18789137d51b4256a86439e167b9e /fpga/usrp3/top/e31x/build_e31x.tcl | |
parent | fpga: Update x3xx/e3xx RFNoC image core files (diff) | |
download | uhd-4b63ca00894944e03e7897f96316ab24cd5411d1.tar.xz uhd-4b63ca00894944e03e7897f96316ab24cd5411d1.zip |
fpga: Add incremental to strategies for e3xx, n3xx, x3xx
Diffstat (limited to 'fpga/usrp3/top/e31x/build_e31x.tcl')
-rw-r--r-- | fpga/usrp3/top/e31x/build_e31x.tcl | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/fpga/usrp3/top/e31x/build_e31x.tcl b/fpga/usrp3/top/e31x/build_e31x.tcl index e07b124c2..3f1f0ff5c 100644 --- a/fpga/usrp3/top/e31x/build_e31x.tcl +++ b/fpga/usrp3/top/e31x/build_e31x.tcl @@ -1,5 +1,7 @@ # -# Copyright 2016 Ettus Research +# Copyright 2024 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later # source $::env(VIV_TOOLS_DIR)/scripts/viv_utils.tcl @@ -14,6 +16,7 @@ vivado_utils::generate_post_synth_reports # STEP#3: Run implementation strategy set e31x_strategy [dict create] +dict set e31x_strategy "implementation.incremental" 0 dict set e31x_strategy "opt_design.is_enabled" 1 dict set e31x_strategy "opt_design.directive" "Default" dict set e31x_strategy "post_opt_power_opt_design.is_enabled" 0 |