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| author |   mkoop <marian.koop@ni.com> | 2023-11-14 13:08:22 +0100 |
|---|---|---|
| committer |   Aki Tomita <121511582+atomita-ni@users.noreply.github.com> | 2023-11-17 11:51:08 -0600 |
| commit | daaff8ef56de2c45d83da440f29d3f2f79aaf285 (patch) | |
| tree | 785f3159edfe811c13d68fa78afe494d4a5c045c /host | |
| parent | docs: Correct typo for X3x0 reference clock power (diff) | |
| download | uhd-daaff8ef56de2c45d83da440f29d3f2f79aaf285.tar.xz uhd-daaff8ef56de2c45d83da440f29d3f2f79aaf285.zip | |
doc: x440: Fix error in master clock table for 1000MHz mcr.
Diffstat (limited to 'host')
| -rw-r--r-- | host/docs/usrp_x4xx.dox | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/host/docs/usrp_x4xx.dox b/host/docs/usrp_x4xx.dox index 0f7a78558..3c69903aa 100644 --- a/host/docs/usrp_x4xx.dox +++ b/host/docs/usrp_x4xx.dox @@ -1004,7 +1004,7 @@ select set of MCR during testing and design validation. For the X440, these are: |:--:|:--:|:--:|:--:|:--:|--| |368.64 MHz|2.94912 GHz| 8 | 295 MHz | xx_400, \n xx_1600 | Same Fc as X410, UHD default | |2000 MHz | 4.0 GHz | 2 | 1600 MHz | xx_1600 | Maximum Digital Bandwidth | -|1000 MHz | 4.0 GHz | 4 | 1600 MHz | xx_1600 | | +|1000 MHz | 4.0 GHz | 4 | 800 MHz | xx_1600 | | |500 MHz | 4.0 GHz | 8 | 400 MHz | xx_400, \n xx_1600 | Maximum Fc | |400 MHz | 3.2 GHz | 8 | 320 MHz | xx_400, \n xx_1600 | | |360 MHz | 2.88 GHz | 8 | 288 MHz | xx_400, \n xx_1600 | L-Band Applications | |