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* fpga/usrp3: Fix DC truncation bias by adding rounding to DDC chain.Ryan Volz9 days3-29/+88
* image builder: Add --build-ip-dir optionMartin Braun9 days2-2/+13
* fpga: tools: Force write when saving Vivado project fileWade Fife9 days1-1/+1
* fpga: tools: Add --fpga-dir to repeat_fpga_buildWade Fife9 days1-2/+13
* ci: Update FPGA CI pipelines to match new image builderMartin Braun9 days1-2/+9
* fpga: Align build process for all targetsMartin Braun9 days37-9598/+528
* fpga/mpm: x4xx: Add device DNA read capabilityMartin Braun9 days11-20/+558
* fpga: x400: Add PPS interface to X410/X440 BSPJonathon Pendlum9 days1-0/+3
* x300: Add support for reading device DNAMartin Braun9 days1-1/+7
* fpga: x400: Add netlist make flowJavier Valenzuela9 days5-9/+138
* fpga: Add passthru CHDR/DMA transport adapter moduleMartin Braun9 days2-0/+78
* fpga: x4xx: Replace Ethernet transport adapterWade Fife9 days15-790/+881
* utils: image builder: Major updateMartin Braun9 days93-20268/+1716
* fpga/rfnoc: Add license checker blockMartin Braun2024-05-277-5/+775
* fpga: Add license checker moduleMartin Braun2024-05-275-0/+642
* fpga: Add cores for SHA256Martin Braun2024-05-277-0/+1326
* fpga: rfnoc: Enable blocks with no inputs/outputsMartin Braun2024-05-272-144/+221
* fpga: Add module for reading Xilinx device DNAMartin Braun2024-05-275-0/+475
* fpga: x400: zbx: Set Locale for ZBX Lattice buildMax Köhler2024-05-211-0/+1
* fpga: tools: Fix VHDL and Verilog types in modify_bdtclMax Köhler2024-05-181-6/+16
* fpga: sim: Fix cast in PkgRandomWade Fife2024-05-161-3/+3
* fpga: sim: Fix test_status indices in PkgTestExecWade Fife2024-05-161-3/+3
* fpga: rfnoc: reverse FIR filter coefficients to get embedded in DSPE48Max Köhler2024-04-266-33/+47
* fpga: x400: Place SPI into IOB on X440Max Köhler2024-04-091-0/+4
* fpga: tools: Fix VIVADO_PROJECT variableWade Fife2024-04-022-2/+2
* fpga: Add option to specify build output directoryWade Fife2024-03-157-127/+138
* fpga: Add option to build IP onlyWade Fife2024-03-155-10/+25
* fpga: Add Vivado project option to USRP FPGA buildsWade Fife2024-03-155-0/+5
* fpga: tools: Add option to save Vivado projectWade Fife2024-03-153-1/+13
* fpga: utils: Use default image core nameWade Fife2024-03-151-1/+1
* fpga: n3xx: Rename BIST image coresWade Fife2024-03-159-6/+9
* fpga: Add incremental to strategies for e3xx, n3xx, x3xxWade Fife2024-03-144-5/+17
* fpga: Update x3xx/e3xx RFNoC image core filesJavier Valenzuela2024-03-134-380/+380
* fpga: tools: Fix -quiet in modify_bdtclMax Köhler2024-03-131-1/+1
* fpga: rfnoc: Add EOB to source port of null_src_sink blockFrancisco Salomon2024-03-122-5/+22
* fpga: x4xx: add option for incremental Vivado buildMax Köhler2024-03-124-12/+28
* fpga: tools: viv_ip_utils to update hdl_sources.tclMax Köhler2024-03-081-0/+29
* fpga: x400: zbx: Improve Lattice make flowMax Köhler2024-03-055-14/+26
* fpga: Update tooling to use image builder instead of makeMartin Braun2024-02-251-10/+61
* n3xx: Add comments on clock_source=external,time_source=gpsdoDavid Raeman2024-02-211-1/+7
* fpga: utils: Add update_image_cores.shMartin Braun2024-02-151-0/+13
* fpga: x400: Update PS DRAM speed binWade Fife2024-01-082-14/+14
* fpga: x300: Remove irrelevant critical warningMartin Braun2024-01-042-1/+8
* fpga: x300: sfpp: Fix warning about duplicate regMartin Braun2024-01-041-19/+9
* fpga: tools: Spruce up launch_vivado.pyMartin Braun2023-12-131-71/+61
* fpga: Add more spurious files to gitignoreMartin Braun2023-12-131-1/+3
* fpga: x410: Add dev_config.jsonMartin Braun2023-12-131-0/+2
* fpga: Remove dupes from DESIGN_SRCSMartin Braun2023-12-132-2/+5
* fpga: Replace references to python -> python3Martin Braun2023-12-058-9/+10
* fpga: lib: Add default wiretypes to synchronizerMartin Braun2023-11-142-8/+16
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