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* fpga: Add incremental to strategies for e3xx, n3xx, x3xxWade Fife2024-03-144-5/+17
* fpga: Update x3xx/e3xx RFNoC image core filesJavier Valenzuela2024-03-134-380/+380
* fpga: x4xx: add option for incremental Vivado buildMax Köhler2024-03-122-4/+8
* fpga: x400: zbx: Improve Lattice make flowMax Köhler2024-03-053-12/+15
* n3xx: Add comments on clock_source=external,time_source=gpsdoDavid Raeman2024-02-211-1/+7
* fpga: x400: Update PS DRAM speed binWade Fife2024-01-082-14/+14
* fpga: x300: Remove irrelevant critical warningMartin Braun2024-01-042-1/+8
* fpga: x300: sfpp: Fix warning about duplicate regMartin Braun2024-01-041-19/+9
* fpga: x410: Add dev_config.jsonMartin Braun2023-12-131-0/+2
* fpga: Replace references to python -> python3Martin Braun2023-12-054-5/+6
* fpga: x400: add default declaration for DRAM_BANKSJavier Valenzuela2023-11-141-0/+3
* fpga: x400: rfdc timing cleanupJavier Valenzuela2023-11-031-16/+16
* fpga: x400: Add clock IDs to X440 200 MHz imageWade Fife2023-11-032-0/+10
* fpga: x400: bump minor revisionJavier Valenzuela2023-10-255-21/+21
* fpga: x400: update signals to run on two domainsJavier Valenzuela2023-10-255-136/+217
* fpga: x400: Split DRAM interface on X440_X4_200Wade Fife2023-10-251-47/+93
* fpga: x400: Split DRAM interface into two banksWade Fife2023-10-2420-2680/+3876
* x4xx: Add support for auto clock IDMartin Braun2023-10-2018-0/+90
* fpga: x400: Add X440 200 MHz variantWade Fife2023-10-185-1/+1827
* fpga: x400: Add CE clockWade Fife2023-10-1815-384/+453
* fpga: n3xx: Add CE clockWade Fife2023-10-1812-658/+761
* fpga: x400: propagate pps_sync changesJavier Valenzuela2023-10-1712-118/+380
* fpga: x400: pps_sync cleanupJavier Valenzuela2023-10-171-34/+37
* fpga: x440: remove extra synchronizerJavier Valenzuela2023-10-171-2/+2
* fpga: x400: Update PL DRAM speed binWade Fife2023-09-142-11/+11
* fpga: x440: cpld: led control cleanupJavier Valenzuela2023-09-143-196/+4
* fpga: x400: Fix SPI trigger clock crossingMark Eid2023-07-311-8/+37
* fpga: Fix RFNoC OOT Makefile inclusionWade Fife2023-07-265-3/+8
* fpga: x440: fbx: clean up I2C triggersJavier Valenzuela2023-07-201-48/+27
* fpga: x400: Fix PRC divider register mapMark Eid2023-07-103-21/+21
* fpga: x400: Add X440 to default make targetsWade Fife2023-06-261-1/+1
* fpga: x400: Fix DB1 timekeeper strobeJavier Valenzuela2023-06-161-1/+6
* fpga: Add X440/FBX supportJavier Valenzuela2023-06-12117-8290/+20166
* fpga: x400: sim: Add 10 GbE with wide CHDRmaeidWade Fife2023-06-111-0/+8
* mpm/fpga: x4xx: Major updates in preparation for future devicesJavier Valenzuela2023-05-2377-2321/+40884
* fpga: x4xx: Refactor MB CPLD code for future devicesJavier Valenzuela2023-05-2333-14/+5895
* FPGA: Synchronize X300 RX frontends on time changemichael-west2023-05-106-6/+14
* fpga: x4xx: Rename x410 -> x4xx for common DTS filesMartin Braun2023-04-2416-25/+25
* fpga: x400: Set QSFP LEDs on startupWade Fife2023-03-241-21/+60
* fpga: x400: Add X4C_200 RFNoC image coresWade Fife2023-02-264-1/+1211
* fpga: x400: Add CG_200 RFNoC image coresWade Fife2023-02-264-1/+1775
* fpga: Update all RFNoC image core filesWade Fife2023-02-2426-2229/+2672
* fpga: x400: Add support for X4C, C1, and UC variantsWade Fife2023-02-244-38/+370
* fpga: x400: Add 1x64, 2x64, and 1x128 DRAM interconnectWade Fife2023-02-248-325/+2022
* fpga: x400: Use x410_200 image core for x410_100 imagesWade Fife2023-02-245-1879/+3
* fpga: x400: Remove CPU_W parameterWade Fife2023-02-244-13/+3
* fpga: x400: Add ifdef to remove QSFP wrappers when unusedWade Fife2023-02-241-228/+250
* fpga: x400: Make transport adapter width configurableWade Fife2023-02-244-95/+157
* fpga: Update RFNoC YAML copyrightWade Fife2023-02-2214-14/+14
* fpga: Reformat javascript in docmichael-west2023-02-101-10/+644
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