diff options
| author |   Marek Vasut <marex@denx.de> | 2024-06-28 01:30:09 +0200 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2024-07-01 22:21:46 +0800 |
| commit | a38d101e46080fd32135b139d8eafb778a214f68 (patch) | |
| tree | 13d5f0bf4689c1376bf7e8024f16fc25d11c451a | |
| parent | arm64: dts: imx8mp: Do not reconfigure Audio PLL2 on DH i.MX8M Plus DHCOM SoM (diff) | |
| download | wireguard-linux-a38d101e46080fd32135b139d8eafb778a214f68.tar.xz wireguard-linux-a38d101e46080fd32135b139d8eafb778a214f68.zip | |
arm64: dts: imx8mp: Update Fast ethernet PHY MDIO addresses to match DH i.MX8MP DHCOM rev.200
The production DH i.MX8MP DHCOM SoM rev.200 uses updated PHY MDIO addresses
for the Fast ethernet PHYs. Update the base SoM DT to cater for this change.
Prototype rev.100 SoM was never publicly available and was manufactured in
limited series, anything currently available is rev.200 or newer, so it is
safe to update the DT this way.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi index a1b77d57a906..a90e28c07e3f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi @@ -110,14 +110,14 @@ #size-cells = <0>; /* Up to one of these two PHYs may be populated. */ - ethphy0f: ethernet-phy@0 { /* SMSC LAN8740Ai */ + ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */ compatible = "ethernet-phy-id0007.c110", "ethernet-phy-ieee802.3-c22"; interrupt-parent = <&gpio3>; interrupts = <19 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&pinctrl_ethphy0>; pinctrl-names = "default"; - reg = <0>; + reg = <1>; reset-assert-us = <1000>; reset-deassert-us = <1000>; reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>; @@ -156,14 +156,14 @@ #size-cells = <0>; /* Up to one PHY may be populated. */ - ethphy1f: ethernet-phy@1 { /* SMSC LAN8740Ai */ + ethphy1f: ethernet-phy@2 { /* SMSC LAN8740Ai */ compatible = "ethernet-phy-id0007.c110", "ethernet-phy-ieee802.3-c22"; interrupt-parent = <&gpio4>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&pinctrl_ethphy1>; pinctrl-names = "default"; - reg = <1>; + reg = <2>; reset-assert-us = <1000>; reset-deassert-us = <1000>; reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; |