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author | 2024-01-19 11:11:29 +0000 | |
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committer | 2024-01-23 13:53:19 +0100 | |
commit | e62c706f3aa0cf1c2b4a71542cb07223e68453c6 (patch) | |
tree | 8d058e3d2f7818f9a32cbc2265a707b0edfac575 | |
parent | arm64: dts: exynos: gs101: remove reg-io-width from serial (diff) | |
download | wireguard-linux-e62c706f3aa0cf1c2b4a71542cb07223e68453c6.tar.xz wireguard-linux-e62c706f3aa0cf1c2b4a71542cb07223e68453c6.zip |
arm64: dts: exynos: gs101: enable cmu-peric0 clock controller
Enable the cmu-peric0 clock controller. It feeds USI and I3c.
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240119111132.1290455-6-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-rw-r--r-- | arch/arm64/boot/dts/exynos/google/gs101.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index d6a2644d0b48..3b1b6aa1b299 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -359,6 +359,16 @@ }; }; + cmu_peric0: clock-controller@10800000 { + compatible = "google,gs101-cmu-peric0"; + reg = <0x10800000 0x4000>; + #clock-cells = <1>; + clocks = <&ext_24_5m>, + <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>, + <&cmu_top CLK_DOUT_CMU_PERIC0_IP>; + clock-names = "oscclk", "bus", "ip"; + }; + sysreg_peric0: syscon@10820000 { compatible = "google,gs101-peric0-sysreg", "syscon"; reg = <0x10820000 0x10000>; |