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| author |   Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-09-02 12:08:33 +0200 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2018-09-26 16:52:27 +0200 |
| commit | 1d6050d67ea820db776691e46e744e6f8d8e2c64 (patch) | |
| tree | fd2db3a49bb6a05e1adf53a6d6e8560d5c17f5de /arch/arm/boot/dts/tegra20-colibri-iris.dts | |
| parent | ARM: tegra: colibri_t20: iris: add missing aliases (diff) | |
| download | wireguard-linux-1d6050d67ea820db776691e46e744e6f8d8e2c64.tar.xz wireguard-linux-1d6050d67ea820db776691e46e744e6f8d8e2c64.zip | |
ARM: tegra: colibri_t20: iris: annotate i2c busses
Annotate I2C busses: GEN2_I2C and CAM_I2C (I2C3) being unused and
DDC_CLOCK/DATA on X3 pin 15/16 e.g. used for display EDID.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-colibri-iris.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-colibri-iris.dts | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index cbf1f4d76813..cc9e372a3b58 100644 --- a/arch/arm/boot/dts/tegra20-colibri-iris.dts +++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts @@ -73,6 +73,11 @@ }; }; + /* GEN2_I2C: unused */ + + /* CAM_I2C (I2C3): unused */ + + /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */ i2c_ddc: i2c@7000c400 { status = "okay"; }; |