diff options
| author |   Tony W Wang-oc <TonyWWang-oc@zhaoxin.com> | 2019-09-18 14:19:32 +0800 |
|---|---|---|
| committer |   Borislav Petkov <bp@suse.de> | 2019-10-01 12:33:09 +0200 |
| commit | 5a3d56a034be9e8e87a6cb9ed3f2928184db1417 (patch) | |
| tree | 72d4cfdaffbe82a9ec60aa7666ab191ac7c130b7 /arch/x86/kernel/cpu/mce/intel.c | |
| parent | x86/mce: Add Zhaoxin MCE support (diff) | |
| download | wireguard-linux-5a3d56a034be9e8e87a6cb9ed3f2928184db1417.tar.xz wireguard-linux-5a3d56a034be9e8e87a6cb9ed3f2928184db1417.zip | |
x86/mce: Add Zhaoxin CMCI support
All newer Zhaoxin CPUs support CMCI and are compatible with Intel's
Machine-Check Architecture. Add that support for Zhaoxin CPUs.
[ bp: Massage comments and export intel_init_cmci(). ]
Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: CooperYan@zhaoxin.com
Cc: DavidWang@zhaoxin.com
Cc: HerryYang@zhaoxin.com
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: QiyuanWang@zhaoxin.com
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/1568787573-1297-4-git-send-email-TonyWWang-oc@zhaoxin.com
Diffstat (limited to 'arch/x86/kernel/cpu/mce/intel.c')
| -rw-r--r-- | arch/x86/kernel/cpu/mce/intel.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c index 88cd9598fa57..fb6e990b5a77 100644 --- a/arch/x86/kernel/cpu/mce/intel.c +++ b/arch/x86/kernel/cpu/mce/intel.c @@ -85,8 +85,10 @@ static int cmci_supported(int *banks) * initialization is vendor keyed and this * makes sure none of the backdoors are entered otherwise. */ - if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) + if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL && + boot_cpu_data.x86_vendor != X86_VENDOR_ZHAOXIN) return 0; + if (!boot_cpu_has(X86_FEATURE_APIC) || lapic_get_maxlvt() < 6) return 0; rdmsrl(MSR_IA32_MCG_CAP, cap); @@ -423,7 +425,7 @@ void cmci_disable_bank(int bank) raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); } -static void intel_init_cmci(void) +void intel_init_cmci(void) { int banks; |