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authorClaudiu Beznea <claudiu.beznea@microchip.com>2020-07-22 10:38:20 +0300
committerStephen Boyd <sboyd@kernel.org>2020-07-24 02:19:08 -0700
commit75c88143f3b879664cc5bf68b91854c1a98f5e5b (patch)
treef3b442c3e19e64e01e0c5a7012cbcbc106b2500e /drivers/clk/at91/pmc.h
parentclk: at91: clk-generated: add mux_table option (diff)
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clk: at91: clk-master: add master clock support for SAMA7G5
Add master clock support (MCK1..4) for SAMA7G5. SAMA7G5's PMC has multiple master clocks feeding different subsystems. One of them feeds image subsystem and is changeable based on image subsystem needs. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1595403506-8209-13-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/at91/pmc.h')
-rw-r--r--drivers/clk/at91/pmc.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 2bfe1405f9f8..29d150feaa46 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -155,6 +155,13 @@ at91_clk_register_master(struct regmap *regmap, const char *name,
const struct clk_master_characteristics *characteristics);
struct clk_hw * __init
+at91_clk_sama7g5_register_master(struct regmap *regmap,
+ const char *name, int num_parents,
+ const char **parent_names, u32 *mux_table,
+ spinlock_t *lock, u8 id, bool critical,
+ int chg_pid);
+
+struct clk_hw * __init
at91_clk_register_peripheral(struct regmap *regmap, const char *name,
const char *parent_name, u32 id);
struct clk_hw * __init