diff options
| author |   Doug Brown <doug@schmorgal.com> | 2022-06-12 12:29:29 -0700 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2022-09-30 13:34:06 -0700 |
| commit | ac1d62c948d063ec99b3b23d02af8260bba4660c (patch) | |
| tree | 9bf9f162625b988a8ba94c83c39fd2c207c0e7e5 /drivers/clk/mmp | |
| parent | dt-bindings: marvell,pxa168: add clock ids for additional dividers (diff) | |
| download | wireguard-linux-ac1d62c948d063ec99b3b23d02af8260bba4660c.tar.xz wireguard-linux-ac1d62c948d063ec99b3b23d02af8260bba4660c.zip | |
clk: mmp: pxa168: add new clocks for peripherals
This commit adds three new clocks that previously didn't exist, but are
needed in order to match the clock parenting as described in the PXA168
datasheet.
Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-5-doug@schmorgal.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mmp')
| -rw-r--r-- | drivers/clk/mmp/clk-of-pxa168.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/mmp/clk-of-pxa168.c b/drivers/clk/mmp/clk-of-pxa168.c index 88b5200262d9..2526d56a450b 100644 --- a/drivers/clk/mmp/clk-of-pxa168.c +++ b/drivers/clk/mmp/clk-of-pxa168.c @@ -91,6 +91,9 @@ static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = { {PXA168_CLK_PLL1_13_1_5, "pll1_13_1_5", "pll1_13", 1, 5, 0}, {PXA168_CLK_PLL1_2_1_5, "pll1_2_1_5", "pll1_2", 1, 5, 0}, {PXA168_CLK_PLL1_3_16, "pll1_3_16", "pll1", 3, 16, 0}, + {PXA168_CLK_PLL1_2_1_10, "pll1_2_1_10", "pll1_2", 1, 10, 0}, + {PXA168_CLK_PLL1_2_3_16, "pll1_2_3_16", "pll1_2", 3, 16, 0}, + {PXA168_CLK_CLK32_2, "clk32_2", "clk32", 1, 2, 0}, }; static struct mmp_clk_factor_masks uart_factor_masks = { |