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path: root/drivers/clk/mmp (follow)
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2023-12-16clk: mmp: pxa168: Fix memory leak in pxa168_clk_init()Kuan-Wei Chiu1-0/+3
2023-08-22clk: pxa910: Move number of clocks to driver sourceDuje Mihanović1-1/+3
2023-08-22clk: pxa1928: Move number of clocks to driver sourceDuje Mihanović1-2/+5
2023-08-22clk: pxa168: Move number of clocks to driver sourceDuje Mihanović1-1/+3
2023-08-22clk: mmp2: Move number of clocks to driver sourceDuje Mihanović2-3/+7
2023-08-22clk: mmp: Remove old non-OF clock driversDuje Mihanović4-1137/+0
2023-03-28clk: mmp: Convert to platform remove callback returning voidUwe Kleine-König1-4/+2
2022-09-30clk: mmp: pxa168: control shared SDH bits with separate clockDoug Brown1-4/+7
2022-09-30clk: mmp: pxa168: add clocks for SDH2 and SDH3Doug Brown1-0/+6
2022-09-30clk: mmp: pxa168: fix GPIO clock enable bitsDoug Brown1-1/+1
2022-09-30clk: mmp: pxa168: add muxes for more peripheralsDoug Brown1-10/+32
2022-09-30clk: mmp: pxa168: fix incorrect parent clocksDoug Brown1-6/+6
2022-09-30clk: mmp: pxa168: fix const-correctnessDoug Brown1-7/+7
2022-09-30clk: mmp: pxa168: add new clocks for peripheralsDoug Brown1-0/+3
2022-09-30clk: mmp: pxa168: fix incorrect dividersDoug Brown1-2/+2
2022-09-30clk: mmp: pxa168: add additional register definesDoug Brown1-7/+24
2022-06-10treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2)Thomas Gleixner12-48/+12
2022-03-29Merge branches 'clk-starfive', 'clk-ti', 'clk-terminate' and 'clk-cleanup' into clk-nextStephen Boyd1-1/+1
2022-03-11clk: cleanup commentsTom Rix1-1/+1
2022-02-25clk: mmp: Declare mux tables as const u32[]Jonathan Neuschäfer1-2/+2
2021-01-12clk: mmp2: fix build without CONFIG_PMArnd Bergmann1-2/+4
2020-10-20Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', 'clk-const' and 'clk-mmp2' into clk-nextStephen Boyd1-2/+2
2020-10-13clk: mmp2: Fix the display clock divider baseLubomir Rintel1-2/+2
2020-09-22clk: mmp: pxa1928: drop unused 'clk' variableKrzysztof Kozlowski1-2/+1
2020-07-29clk: mmp: avoid missing prototype warningArnd Bergmann2-0/+2
2020-06-10Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds6-15/+688
2020-05-27clk: mmp2: Add audio clock controller driverLubomir Rintel2-0/+444
2020-05-27clk: mmp2: Add support for power islandsLubomir Rintel4-1/+168
2020-05-27clk: mmp2: Add the audio clockLubomir Rintel1-0/+4
2020-05-27clk: mmp2: Add the I2S clocksLubomir Rintel1-0/+46
2020-05-27clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init()Lubomir Rintel1-2/+2
2020-05-27clk: mmp2: Move thermal register defines up a bitLubomir Rintel1-4/+4
2020-05-27clk: mmp: frac: Allow setting bits other than the numerator/denominatorLubomir Rintel2-0/+4
2020-05-27clk: mmp: frac: Do not lose last 4 digits of precisionLubomir Rintel1-8/+16
2020-04-13clk: mmp2: fix link error without mmp2Arnd Bergmann3-39/+32
2020-03-20clk: mmp2: Fix bit masks for LCDC I/O and pixel clocksLubomir Rintel1-2/+2
2020-03-20clk: mmp2: Add clock for fifth SD HCI on MMP3Lubomir Rintel1-0/+2
2020-03-20clk: mmp2: Add clocks for the thermal sensorsLubomir Rintel1-0/+16
2020-03-20clk: mmp2: add the GPU clocksLubomir Rintel1-0/+61
2020-03-20clk: mmp2: Add PLLs that are available on MMP3Lubomir Rintel1-7/+27
2020-03-20clk: mmp2: Check for MMP3Lubomir Rintel1-0/+12
2020-03-20clk: mmp2: Stop pretending PLL outputs are constantLubomir Rintel1-2/+14
2020-03-20clk: mmp2: Add support for PLL clock sourcesLubomir Rintel4-1/+195
2020-03-20clk: mmp2: Constify some stringsLubomir Rintel3-9/+10
2020-03-20clk: mmp2: Remove a unused prototypeLubomir Rintel1-3/+0
2020-02-08Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+6
2020-02-03Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds2-2/+6
2020-01-06clk: mmp2: Add HSIC clocksLubomir Rintel1-0/+6
2020-01-06clk: mmp2: Fix the order of timer mux parentsLubomir Rintel1-1/+1
2019-12-23clk: let init callback return an error codeJerome Brunet2-2/+6