diff options
| author |   Cong Dang <cong.dang.xn@renesas.com> | 2024-02-14 14:02:16 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2024-02-20 11:37:31 +0100 |
| commit | ce772318637261525ee868ccfeb17b1927fcd812 (patch) | |
| tree | 2b7577ee38cf4416785ef136cc8717510e1b18c2 /drivers/clk/renesas | |
| parent | clk: renesas: r8a779h0: Add SDHI clock (diff) | |
| download | wireguard-linux-ce772318637261525ee868ccfeb17b1927fcd812.tar.xz wireguard-linux-ce772318637261525ee868ccfeb17b1927fcd812.zip | |
clk: renesas: r8a779h0: Add SYS-DMAC clocks
Add the module clocks used by the Direct Memory Access Controllers for
System (SYS-DMAC) on the Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/0285ef5d0c0c9d232e196559c9130ab46733d7f7.1707915706.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a779h0-cpg-mssr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index b95f1e5e6d47..92359306dc0d 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -185,6 +185,8 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = { DEF_MOD("i2c2", 520, R8A779H0_CLK_S0D6_PER), DEF_MOD("i2c3", 521, R8A779H0_CLK_S0D6_PER), DEF_MOD("sdhi0", 706, R8A779H0_CLK_SD0), + DEF_MOD("sydm1", 709, R8A779H0_CLK_S0D6_PER), + DEF_MOD("sydm2", 710, R8A779H0_CLK_S0D6_PER), DEF_MOD("wdt1:wdt0", 907, R8A779H0_CLK_R), DEF_MOD("pfc0", 915, R8A779H0_CLK_CP), DEF_MOD("pfc1", 916, R8A779H0_CLK_CP), |