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| author |   Evan Quan <evan.quan@amd.com> | 2019-05-06 16:37:40 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-05-24 12:20:52 -0500 |
| commit | 36f5f8a74981b857596e7eedd424f4573a81c6e9 (patch) | |
| tree | 9d9fd975b2341f6e6d9b8338424c48cb65de78cb /drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | |
| parent | drm/amd/powerplay: fix Vega10 mclk/socclk voltage link setup (diff) | |
| download | wireguard-linux-36f5f8a74981b857596e7eedd424f4573a81c6e9.tar.xz wireguard-linux-36f5f8a74981b857596e7eedd424f4573a81c6e9.zip | |
drm/amd/powerplay: valid Vega10 DPMTABLE_OD_UPDATE_VDDC settings V2
With user specified voltage(DPMTABLE_OD_UPDATE_VDDC), the AVFS
will be disabled. However, the buggy code makes this actually not
working as expected.
- V2: clear all OD flags excpet DPMTABLE_OD_UPDATE_VDDC
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c')
0 files changed, 0 insertions, 0 deletions