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author | 2020-06-03 14:15:25 -0700 | |
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committer | 2020-06-04 09:35:23 -0700 | |
commit | b8226d62e77620d372f6eb8c34b51798f3962414 (patch) | |
tree | dc6224dbc4de84eb013682debc0b57687f605a77 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
parent | drm/i915/rkl: Add DDC pin mapping (diff) | |
download | wireguard-linux-b8226d62e77620d372f6eb8c34b51798f3962414.tar.xz wireguard-linux-b8226d62e77620d372f6eb8c34b51798f3962414.zip |
drm/i915/rkl: Handle comp master/slave relationships for PHYs
Certain combo PHYs act as a compensation master to other PHYs and need
to be initialized with a special irefgen bit in the PORT_COMP_DW8
register. Previously PHY A was the only compensation master (for PHYs
B & C), but RKL adds a fourth PHY which is slaved to PHY C instead.
Bspec: 49291
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200603211529.3005059-12-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions