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| author |   Julien Masson <jmasson@baylibre.com> | 2019-06-24 16:48:12 +0200 |
|---|---|---|
| committer |   Neil Armstrong <narmstrong@baylibre.com> | 2019-08-09 11:38:12 +0200 |
| commit | 39bf9985b8598f20a3bf49844d2ac538a0d5697f (patch) | |
| tree | 0a9d440859c936287a6e41445afb0a29c63ac6e3 /drivers/gpu/drm/meson/meson_vpp.c | |
| parent | drm: meson: mask value when writing bits relaxed (diff) | |
| download | wireguard-linux-39bf9985b8598f20a3bf49844d2ac538a0d5697f.tar.xz wireguard-linux-39bf9985b8598f20a3bf49844d2ac538a0d5697f.zip | |
drm: meson: crtc: use proper macros instead of magic constants
This patch add new macros which describe couple bits field of the
following registers:
- VD1_BLEND_SRC_CTRL
- VPP_SC_MISC
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/86wohb82fa.fsf@baylibre.com
Diffstat (limited to 'drivers/gpu/drm/meson/meson_vpp.c')
0 files changed, 0 insertions, 0 deletions