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author | Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2018-01-19 14:28:21 +0530 |
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committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2018-01-29 20:44:15 +0200 |
commit | 21ae43570940f8393a80369f62a3880bd64daad8 (patch) | |
tree | 2dd464dcbcbf2ec9a38400ac05533119e9c97615 /drivers/platform/x86/intel_pmc_core.h | |
parent | platform/x86: intel_pmc_core: Refactor debugfs entries (diff) | |
download | wireguard-linux-21ae43570940f8393a80369f62a3880bd64daad8.tar.xz wireguard-linux-21ae43570940f8393a80369f62a3880bd64daad8.zip |
platform/x86: intel_pmc_core: Substitute PCI with CPUID enumeration
The Only use of PCI device enumeration here is to get the PMC base address
which is a fixed value i.e. 0xFE000000. On some platforms this can be read
through a non standard PCI BAR. But after Kabylake, PMC is not exposed as a
PCI device anymore. There are other non standard methods like ACPI LPIT
which can also be used for obtaining this value.
For simplicity, this value can be hardcoded as it won't change.
Since we don't have a PMC PCI device on any platform after Kabylake, this
creates a foundation for future SoC support.
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/platform/x86/intel_pmc_core.h')
-rw-r--r-- | drivers/platform/x86/intel_pmc_core.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h index e3be1d2b08cd..9df4a60a179f 100644 --- a/drivers/platform/x86/intel_pmc_core.h +++ b/drivers/platform/x86/intel_pmc_core.h @@ -21,8 +21,7 @@ #ifndef PMC_CORE_H #define PMC_CORE_H -/* Sunrise Point Power Management Controller PCI Device ID */ -#define SPT_PMC_PCI_DEVICE_ID 0x9d21 +#define PMC_BASE_ADDR_DEFAULT 0xFE000000 #define SPT_PMC_BASE_ADDR_OFFSET 0x48 #define SPT_PMC_SLP_S0_RES_COUNTER_OFFSET 0x13c |