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path: root/drivers/platform/x86/intel_pmc_core.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2021-08-20platform/x86: intel_pmc_core: Move to intel sub-directoryKate Hsuan1-346/+0
2021-08-17platform/x86: intel_pmc_core: Prevent possibile overflowDavid E. Box1-0/+2
2021-04-19platform/x86: intel_pmc_core: Add LTR registers for Tiger LakeGayatri Kammela1-1/+3
2021-04-19platform/x86: intel_pmc_core: Add option to set/clear LPM modeDavid E. Box1-0/+20
2021-04-19platform/x86: intel_pmc_core: Get LPM requirements for Tiger LakeGayatri Kammela1-0/+2
2021-04-19platform/x86: intel_pmc_core: Show LPM residency in microsecondsGayatri Kammela1-0/+3
2021-04-19platform/x86: intel_pmc_core: Handle sub-states genericallyGayatri Kammela1-2/+16
2021-04-13platform/x86: intel_pmc_core: export platform global reset bits via etr3 sysfs fileTamar Mashiah1-0/+6
2020-10-07platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed valueGayatri Kammela1-1/+4
2020-05-05platform/x86: intel_pmc_core: avoid unused-function warningsArnd Bergmann1-2/+0
2020-03-20platform/x86: intel_pmc_core: Make pmc_core_substate_res_show() genericGayatri Kammela1-1/+2
2020-02-11platform/x86: intel_pmc_core: Add debugfs support to access live status registersGayatri Kammela1-0/+2
2020-02-10platform/x86: intel_pmc_core: Add debugfs entry for low power mode status registersGayatri Kammela1-0/+5
2020-02-10platform/x86: intel_pmc_core: Add debugfs entry to access sub-state residenciesGayatri Kammela1-0/+21
2020-01-10platform/x86: intel-ips: Use the correct style for SPDX License IdentifierNishad Kamdar1-1/+1
2019-12-20platform/x86: intel_pmc_core: Add Intel Tiger Lake supportGayatri Kammela1-0/+2
2019-12-20platform/x86: intel_pmc_core: Create platform dependent bitmap structsGayatri Kammela1-1/+1
2019-05-06platform/x86: intel_pmc_core: Allow to dump debug registers on S0ix failureRajat Jain1-0/+7
2019-02-23platform/x86: intel_pmc_core: Quirk to ignore XTAL shutdownRajneesh Bhardwaj1-0/+5
2019-02-23platform/x86: intel_pmc_core: Add Package cstates residency infoRajneesh Bhardwaj1-0/+1
2019-02-23platform/x86: intel_pmc_core: Add ICL platform supportRajneesh Bhardwaj1-0/+4
2019-02-21platform/x86: intel_pmc_core: Include Reserved IP for LTRRajneesh Bhardwaj1-0/+2
2019-02-05platform/x86: intel_pmc_core: Fix PCH IP sts readingRajneesh Bhardwaj1-1/+1
2018-11-10platform/x86: intel_pmc_core: Decode Snoop / Non Snoop LTRRajneesh Bhardwaj1-0/+7
2018-11-10platform/x86: intel_pmc_core: Fix LTR IGNORE Max offsetRajneesh Bhardwaj1-1/+3
2018-11-10platform/x86: intel_pmc_core: Show Latency Tolerance infoRajneesh Bhardwaj1-7/+50
2018-09-27platform/x86: intel_pmc: Convert to use SPDX identifierAndy Shevchenko1-10/+1
2018-07-02platform/x86: intel_pmc_core: Add CNP SLPS0 debug registersBox, David E1-0/+6
2018-02-04platform/x86: intel_pmc_core: Special case for CoffeelakeRajneesh Bhardwaj1-0/+2
2018-02-04platform/x86: intel_pmc_core: Add CannonLake PCH supportRajneesh Bhardwaj1-0/+11
2018-01-29platform/x86: intel_pmc_core: Substitute PCI with CPUID enumerationSrinivas Pandruvada1-2/+1
2018-01-16platform/x86: intel_pmc_core: Fix kernel doc for pmc_devRajneesh Bhardwaj1-5/+7
2018-01-16platform/x86: intel_pmc_core: Remove unused variableRajneesh Bhardwaj1-2/+0
2018-01-16platform/x86: intel_pmc_core: Remove unused EXPORTED APIRajneesh Bhardwaj1-1/+0
2017-08-13platform/x86: intel_pmc_core: Make the driver PCH family agnosticSrinivas Pandruvada1-1/+29
2016-12-13platform/x86: intel_pmc_core: Add LTR IGNORE debug featureRajneesh Bhardwaj1-0/+2
2016-12-13platform/x86: intel_pmc_core: Add MPHY PLL clock gating statusRajneesh Bhardwaj1-0/+7
2016-12-13platform/x86: intel_pmc_core: ModPhy core lanes pg statusRajneesh Bhardwaj1-0/+31
2016-12-13platform/x86: intel_pmc_core: Add PCH IP Power Gating StatusRajneesh Bhardwaj1-0/+67
2016-12-13platform/x86: intel_pmc_core: Fix PWRMBASE mask and mmio reg lenRajneesh Bhardwaj1-1/+2
2016-07-06intel_pmc_core: Convert to DEFINE_DEBUGFS_ATTRIBUTEAndy Shevchenko1-2/+1
2016-05-27platform/x86: Add PMC Driver for Intel Core SoCRajneesh Bhardwaj1-0/+51
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