diff options
| author |   Dan Carpenter <dan.carpenter@linaro.org> | 2025-05-28 11:11:09 +0300 |
|---|---|---|
| committer |   Paolo Abeni <pabeni@redhat.com> | 2025-05-29 12:37:42 +0200 |
| commit | 54d34165b4f786d7fea8412a18fb4a54c1eab623 (patch) | |
| tree | e2e2ff58e807ab4024d70ccfc146414aa8405e04 /drivers | |
| parent | driver: net: ethernet: mtk_star_emac: fix suspend/resume issue (diff) | |
| download | wireguard-linux-54d34165b4f786d7fea8412a18fb4a54c1eab623.tar.xz wireguard-linux-54d34165b4f786d7fea8412a18fb4a54c1eab623.zip | |
net/mlx4_en: Prevent potential integer overflow calculating Hz
The "freq" variable is in terms of MHz and "max_val_cycles" is in terms
of Hz. The fact that "max_val_cycles" is a u64 suggests that support
for high frequency is intended but the "freq_khz * 1000" would overflow
the u32 type if we went above 4GHz. Use unsigned long long type for the
mutliplication to prevent that.
Fixes: 31c128b66e5b ("net/mlx4_en: Choose time-stamping shift value according to HW frequency")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/aDbFHe19juIJKjsb@stanley.mountain
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/en_clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c index cd754cd76bde..d73a2044dc26 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_clock.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c @@ -249,7 +249,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = { static u32 freq_to_shift(u16 freq) { u32 freq_khz = freq * 1000; - u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC; + u64 max_val_cycles = freq_khz * 1000ULL * MLX4_EN_WRAP_AROUND_SEC; u64 max_val_cycles_rounded = 1ULL << fls64(max_val_cycles - 1); /* calculate max possible multiplier in order to fit in 64bit */ u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded); |