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| author |   Maxime Ripard <maxime@cerno.tech> | 2020-01-03 16:27:59 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2020-01-04 09:45:09 +0100 |
| commit | a655ede064a3afc39a4d6e0a1056eca3dba477d6 (patch) | |
| tree | 71cbfa835e32cd4f9b009cb557007b0f33b45fcb /include/dt-bindings/clock | |
| parent | clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS (diff) | |
| download | wireguard-linux-a655ede064a3afc39a4d6e0a1056eca3dba477d6.tar.xz wireguard-linux-a655ede064a3afc39a4d6e0a1056eca3dba477d6.zip | |
clk: sunxi: a31: Export the MIPI PLL
The MIPI PLL is used for LVDS. Make sure it's exported in the dt bindings
headers.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/sun6i-a31-ccu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sun6i-a31-ccu.h b/include/dt-bindings/clock/sun6i-a31-ccu.h index c5d13340184a..39878d9dce9f 100644 --- a/include/dt-bindings/clock/sun6i-a31-ccu.h +++ b/include/dt-bindings/clock/sun6i-a31-ccu.h @@ -49,6 +49,8 @@ #define CLK_PLL_VIDEO1_2X 13 +#define CLK_PLL_MIPI 15 + #define CLK_CPU 18 #define CLK_AHB1_MIPIDSI 23 |