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| author |   Sagi Grimberg <sagig@mellanox.com> | 2015-04-14 18:08:24 +0300 |
|---|---|---|
| committer |   Doug Ledford <dledford@redhat.com> | 2015-04-15 16:07:13 -0400 |
| commit | 90a6684c30918786446fd062c7422a4098926891 (patch) | |
| tree | 457f5bc46fd28161fb931b77e7db7b7d73d94aa7 /scripts/gdb/linux/modules.py | |
| parent | IB/iser: Make fastreg pool cache friendly (diff) | |
| download | wireguard-linux-90a6684c30918786446fd062c7422a4098926891.tar.xz wireguard-linux-90a6684c30918786446fd062c7422a4098926891.zip | |
IB/iser: Modify struct iser_mem_reg members
No need to keep lkey, va, len variables, we can keep
them as struct ib_sge. This will help when we change the
memory registration logic.
This patch does not change any functionality.
Signed-off-by: Sagi Grimberg <sagig@mellanox.com>
Signed-off-by: Adir Lev <adirl@mellanox.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions